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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10249 { 14 /* add */, ARM::tSUBi3, Convert__Reg1_2__CCOut1_0__Reg1_3__ThumbModImmNeg1_71_4__CondCode2_1, AMFBS_IsThumb_UseNegativeImmediates, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_ThumbModImmNeg1_7 }, },
11365 { 1600 /* sub */, ARM::tSUBi3, Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1, AMFBS_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_Imm0_7 }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 5224 /* 10592*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tSUBi3), 0,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 6686 case ARM::tSUBi3: {
lib/Target/ARM/ARMBaseInstrInfo.cpp 644 case ARM::tSUBi3: // SUB (immediate) T1
2331 {ARM::tSUBSi3, ARM::tSUBi3},
2799 (OI->getOpcode() == ARM::tSUBi8 || OI->getOpcode() == ARM::tSUBi3) &&
2839 case ARM::tSUBi3:
3110 Opc == ARM::tSUBrr || Opc == ARM::tSUBi3 ||
lib/Target/ARM/ARMFeatures.h 48 case ARM::tSUBi3:
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 709 (isThumb1 && Offset < 8 && Base != ARM::SP) ? ARM::tSUBi3 :
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9786 Inst.setOpcode(ARM::tSUBi3);
lib/Target/ARM/Thumb2SizeReduction.cpp 118 { ARM::t2SUBri, ARM::tSUBi3, ARM::tSUBi8, 3, 8, 1, 1, 0,0, 0,0,0 },
120 { ARM::t2SUBSri,ARM::tSUBi3, ARM::tSUBi8, 3, 8, 1, 1, 2,2, 0,0,0 },
lib/Target/ARM/ThumbRegisterInfo.cpp 243 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3;