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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10248 { 14 /* add */, ARM::tADDi3, Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1, AMFBS_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_Imm0_7 }, },
11366 { 1600 /* sub */, ARM::tADDi3, Convert__Reg1_2__CCOut1_0__Reg1_3__ThumbModImmNeg1_71_4__CondCode2_1, AMFBS_IsThumb_UseNegativeImmediates, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_ThumbModImmNeg1_7 }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 911 /* 1855*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi3), 0,
5197 /* 10529*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi3), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 6453 return fastEmitInst_ri(ARM::tADDi3, &ARM::tGPRRegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 6685 case ARM::tADDi3:
lib/Target/ARM/ARMAsmPrinter.cpp 1858 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tADDi3)
lib/Target/ARM/ARMBaseInstrInfo.cpp 626 case ARM::tADDi3: // ADD (immediate) T1
2326 {ARM::tADDSi3, ARM::tADDi3},
2817 (OI->getOpcode() == ARM::tADDi3 || OI->getOpcode() == ARM::tADDi8 ||
2837 case ARM::tADDi3:
lib/Target/ARM/ARMFeatures.h 29 case ARM::tADDi3:
lib/Target/ARM/ARMISelDAGToDAG.cpp 3420 unsigned Opc = (Addend < 1<<3) ? ARM::tADDi3 : ARM::tADDi8;
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 702 (isThumb1 && Offset < 8) ? ARM::tADDi3 :
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9776 Inst.setOpcode(ARM::tADDi3);
lib/Target/ARM/Thumb2SizeReduction.cpp 84 { ARM::t2ADDri, ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 0,0, 0,1,0 },
86 { ARM::t2ADDSri,ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 2,2, 0,1,0 },
lib/Target/ARM/ThumbRegisterInfo.cpp 243 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3;