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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc11543 { 1955 /* uxth */, ARM::t2UXTH, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, },
11545 { 1955 /* uxth */, ARM::t2UXTH, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, },
11546 { 1955 /* uxth */, ARM::t2UXTH, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, },
11548 { 1955 /* uxth */, ARM::t2UXTH, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 8833 /* 18484*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTH), 0,
8915 /* 18675*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTH), 0,
gen/lib/Target/ARM/ARMGenGlobalISel.inc 4924 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2UXTH,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 6264 case ARM::t2UXTH: {
lib/Target/ARM/ARMFastISel.cpp 2667 /* 16 bit zext */ { ARM::t2UXTH , 0, ARM_AM::no_shift, 0 } }
2899 { { ARM::UXTH, ARM::t2UXTH }, 0, 1, MVT::i16 },
lib/Target/ARM/ARMInstructionSelector.cpp 300 STORE_OPCODE(ZEXT16, UXTH);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9986 case ARM::t2UXTH:
9999 case ARM::t2UXTH: NewOpc = ARM::tUXTH; break;
lib/Target/ARM/Thumb2SizeReduction.cpp 127 { ARM::t2UXTH, ARM::tUXTH, 0, 0, 0, 1, 0, 1,0, 0,1,0 },
698 case ARM::t2UXTH:
945 MCID.getOpcode() == ARM::t2UXTH) && i == 2)