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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc11531 { 1943 /* uxtb */, ARM::t2UXTB, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, },
11533 { 1943 /* uxtb */, ARM::t2UXTB, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, },
11534 { 1943 /* uxtb */, ARM::t2UXTB, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, },
11536 { 1943 /* uxtb */, ARM::t2UXTB, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 8811 /* 18438*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB), 0,
8903 /* 18646*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB), 0,
gen/lib/Target/ARM/ARMGenGlobalISel.inc 4907 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2UXTB,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 6262 case ARM::t2UXTB:
lib/Target/ARM/ARMFastISel.cpp 2902 { { ARM::UXTB, ARM::t2UXTB }, 0, 1, MVT::i8 }
lib/Target/ARM/ARMInstructionSelector.cpp 303 STORE_OPCODE(ZEXT8, UXTB);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9987 case ARM::t2UXTB:
10000 case ARM::t2UXTB: NewOpc = ARM::tUXTB; break;
lib/Target/ARM/Thumb2SizeReduction.cpp 126 { ARM::t2UXTB, ARM::tUXTB, 0, 0, 0, 1, 0, 1,0, 0,1,0 },
697 case ARM::t2UXTB:
944 MCID.getOpcode() == ARM::t2UXTB ||