|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc11413 { 1659 /* sxth */, ARM::t2SXTH, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, },
11415 { 1659 /* sxth */, ARM::t2SXTH, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, },
11416 { 1659 /* sxth */, ARM::t2SXTH, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, },
11418 { 1659 /* sxth */, ARM::t2SXTH, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc35513 /* 78298*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTH), 0,
35577 /* 78440*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTH), 0,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 6261 case ARM::t2SXTH:
lib/Target/ARM/ARMFastISel.cpp 2666 /* 16 bit sext */ { { ARM::t2SXTH , 0, ARM_AM::no_shift, 0 },
2898 { { ARM::SXTH, ARM::t2SXTH }, 0, 0, MVT::i16 },
lib/Target/ARM/ARMInstructionSelector.cpp 299 STORE_OPCODE(SEXT16, SXTH);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9984 case ARM::t2SXTH:
9997 case ARM::t2SXTH: NewOpc = ARM::tSXTH; break;
lib/Target/ARM/Thumb2SizeReduction.cpp 123 { ARM::t2SXTH, ARM::tSXTH, 0, 0, 0, 1, 0, 1,0, 0,1,0 },
696 case ARM::t2SXTH:
943 MCID.getOpcode() == ARM::t2SXTH ||