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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10784 { 687 /* mov */, ARM::t2MOVi, Convert__Reg1_1__T2SOImm1_2__CondCode2_0__reg0, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, },
10797 { 687 /* mov */, ARM::t2MOVi, Convert__Reg1_2__T2SOImm1_3__CondCode2_0__reg0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, },
10799 { 687 /* mov */, ARM::t2MOVi, Convert__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, },
10805 { 691 /* movs */, ARM::t2MOVi, Convert__Reg1_1__T2SOImm1_2__CondCode2_0__regCPSR, AMFBS_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, },
10809 { 691 /* movs */, ARM::t2MOVi, Convert__Reg1_2__T2SOImm1_3__CondCode2_0__regCPSR, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, },
10854 { 738 /* mvn */, ARM::t2MOVi, Convert__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0, AMFBS_IsThumb2_UseNegativeImmediates, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImmNot }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc37539 /* 82690*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2MOVi), 0,
38467 /* 84771*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
38483 /* 84820*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
38499 /* 84869*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40761 /* 89360*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40780 /* 89412*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40795 /* 89455*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40810 /* 89498*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40829 /* 89550*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40877 /* 89696*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
40906 /* 89784*/ OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi), 0,
gen/lib/Target/ARM/ARMGenGlobalISel.inc24641 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2MOVi,
30112 GIR_BuildMI, /*InsnID*/1, /*Opcode*/ARM::t2MOVi,
30143 GIR_BuildMI, /*InsnID*/1, /*Opcode*/ARM::t2MOVi,
30174 GIR_BuildMI, /*InsnID*/1, /*Opcode*/ARM::t2MOVi,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc15962 case ARM::t2MOVi:
lib/Target/ARM/ARMExpandPseudoInsts.cpp 1284 unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVi : ARM::MOVi;
lib/Target/ARM/ARMInstructionSelector.cpp 322 STORE_OPCODE(MOVi, MOVi);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 8391 TmpInst.setOpcode(ARM::t2MOVi);
9943 case ARM::t2MOVi:
lib/Target/ARM/Thumb2SizeReduction.cpp 104 { ARM::t2MOVi, ARM::tMOVi8, 0, 8, 0, 1, 0, 0,0, 1,0,0 },
323 if (Use->getOpcode() == ARM::t2MOVi ||