|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10731 { 641 /* lsl */, ARM::t2LSLri, Convert__Reg1_2__Reg1_2__Imm1_311_3__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_Imm1_31 }, },
10735 { 641 /* lsl */, ARM::t2LSLri, Convert__Reg1_3__Reg1_3__Imm1_311_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_Imm1_31 }, },
10738 { 641 /* lsl */, ARM::t2LSLri, Convert__Reg1_2__Reg1_3__Imm1_311_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_Imm1_31 }, },
10743 { 641 /* lsl */, ARM::t2LSLri, Convert__Reg1_3__Reg1_4__Imm1_311_5__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_Imm1_31 }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc35403 /* 78061*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LSLri), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 6782 return fastEmitInst_ri(ARM::t2LSLri, &ARM::rGPRRegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/ARM/ARMGenGlobalISel.inc25065 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2LSLri,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc15982 case ARM::t2LSLri:
lib/Target/ARM/ARMBaseInstrInfo.cpp 2890 case ARM::t2LSLri:
lib/Target/ARM/ARMExpandPseudoInsts.cpp 1316 case ARM::t2MOVCClsl: NewOpc = ARM::t2LSLri; break;
lib/Target/ARM/ARMISelDAGToDAG.cpp 2878 Opc = (Opc == ARM::tLSLri) ? ARM::t2LSLri : ARM::t2LSRri;
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9496 case ARM::t2LSLri:
9506 case ARM::t2LSLri: NewOpc = ARM::tLSLri; break;
9594 case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break;
lib/Target/ARM/Thumb2SizeReduction.cpp 100 { ARM::t2LSLri, ARM::tLSLri, 0, 5, 0, 1, 0, 0,0, 1,0,1 },