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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10474 { 318 /* eor */, ARM::t2EORrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, },
10481 { 318 /* eor */, ARM::t2EORrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, },
10484 { 318 /* eor */, ARM::t2EORrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, },
10491 { 318 /* eor */, ARM::t2EORrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc30948 /* 68128*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2EORrr), 0,
31474 /* 69241*/ OPC_EmitNode1, TARGET_VAL(ARM::t2EORrr), 0,
31492 /* 69298*/ OPC_EmitNode1, TARGET_VAL(ARM::t2EORrr), 0,
31510 /* 69355*/ OPC_EmitNode1, TARGET_VAL(ARM::t2EORrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 5067 return fastEmitInst_rr(ARM::t2EORrr, &ARM::rGPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 7602 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2EORrr,
7683 GIR_BuildMI, /*InsnID*/1, /*Opcode*/ARM::t2EORrr,
7765 GIR_BuildMI, /*InsnID*/1, /*Opcode*/ARM::t2EORrr,
7827 GIR_BuildMI, /*InsnID*/1, /*Opcode*/ARM::t2EORrr,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc16010 case ARM::t2EORrr:
lib/Target/ARM/ARMBaseInstrInfo.cpp 2886 case ARM::t2EORrr:
3248 case ARM::t2EORrr: {
3299 case ARM::t2EORrr:
3307 case ARM::t2EORrr: NewUseOpc = ARM::t2EORri; break;
lib/Target/ARM/AsmParser/ARMAsmParser.cpp10113 case ARM::t2EORrr:
10130 case ARM::t2EORrr: NewOpc = ARM::tEOR; break;
lib/Target/ARM/Thumb2SizeReduction.cpp 97 { ARM::t2EORrr, 0, ARM::tEOR, 0, 0, 0, 1, 0,0, 1,0,0 },