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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10229 { 14 /* add */, ARM::t2ADDrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, },
10250 { 14 /* add */, ARM::t2ADDrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, },
10260 { 14 /* add */, ARM::t2ADDrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 1046 /* 2187*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrr), 0,
1061 /* 2220*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrr), 0,
5813 /* 11901*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrr), 0,
5818 /* 11913*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 3404 return fastEmitInst_rr(ARM::t2ADDrr, &ARM::GPRnopcRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 1565 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2ADDrr,
1583 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2ADDrr,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc16006 case ARM::t2ADDrr:
lib/Target/ARM/ARMBaseInstrInfo.cpp 2339 {ARM::t2ADDSrr, ARM::t2ADDrr},
2807 (OI->getOpcode() == ARM::ADDrr || OI->getOpcode() == ARM::t2ADDrr ||
2868 case ARM::t2ADDrr:
3246 case ARM::t2ADDrr:
3281 case ARM::t2ADDrr:
3289 NewUseOpc = UseOpc == ARM::t2ADDrr ? ARM::t2ADDri : ARM::t2SUBri;
3292 NewUseOpc = UseOpc == ARM::t2ADDrr ? ARM::t2SUBri : ARM::t2ADDri;
lib/Target/ARM/ARMFastISel.cpp 1761 Opc = isThumb2 ? ARM::t2ADDrr : ARM::ADDrr;
lib/Target/ARM/ARMInstructionSelector.cpp 318 STORE_OPCODE(ADDrr, ADDrr);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7712 case ARM::t2ADDrr:
9815 case ARM::t2ADDrr: {
9846 Inst.setOpcode(ARM::t2ADDrr);
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 596 case ARM::t2ADDrr:
lib/Target/ARM/Thumb2InstrInfo.cpp 282 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2ADDrr), DestReg)
lib/Target/ARM/Thumb2SizeReduction.cpp 85 { ARM::t2ADDrr, ARM::tADDrr, ARM::tADDhirr, 0, 0, 1, 0, 0,1, 0,0,0 },