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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/MachineRegisterInfo.h 565 bool hasOneNonDBGUse(unsigned RegNo) const;
References
lib/CodeGen/LiveRangeEdit.cpp 327 (MOI->readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI))))
lib/CodeGen/LiveRangeShrink.cpp 191 } else if (MRI.hasOneNonDBGUse(Reg) && MRI.hasOneDef(Reg) && DefMO &&
lib/CodeGen/MachineCSE.cpp 173 bool OnlyOneUse = MRI->hasOneNonDBGUse(Reg);
lib/CodeGen/MachineLICM.cpp 801 return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
lib/CodeGen/MachineSink.cpp 209 !Register::isVirtualRegister(DstReg) || !MRI->hasOneNonDBGUse(SrcReg))
454 if (MRI->hasOneNonDBGUse(Reg)) {
lib/CodeGen/PeepholeOptimizer.cpp 467 if (MRI->hasOneNonDBGUse(SrcReg))
1505 if (!MRI->hasOneNonDBGUse(Reg))
lib/CodeGen/RegAllocFast.cpp 786 MRI->hasOneNonDBGUse(VirtReg)) {
lib/CodeGen/RegisterCoalescer.cpp 2042 if (!MRI->hasOneNonDBGUse(SrcReg)) {
lib/CodeGen/TailDuplicator.cpp 240 if (MRI->hasOneNonDBGUse(Src) &&
lib/CodeGen/TargetInstrInfo.cpp 706 MRI.hasOneNonDBGUse(MI1->getOperand(0).getReg());
lib/CodeGen/TwoAddressInstructionPass.cpp 524 if (!MRI->hasOneNonDBGUse(Reg))
lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp 218 if (MOSrc0 && MRI->hasOneNonDBGUse(OrigSrc0))
230 if (MOSrc1 && MRI->hasOneNonDBGUse(OrigSrc1))
313 if (MRI->hasOneNonDBGUse(OrigSrc0)) {
332 if (MRI->hasOneNonDBGUse(OrigSrc1)) {
lib/Target/AArch64/AArch64CondBrTuning.cpp 102 if (MRI->hasOneNonDBGUse(MI.getOperand(0).getReg()))
lib/Target/AArch64/AArch64InstrInfo.cpp 3606 if (!MRI.hasOneNonDBGUse(MI->getOperand(0).getReg()))
4795 if (!MRI->hasOneNonDBGUse(CopyVReg))
4812 if (!MRI->hasOneNonDBGUse(VReg))
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 1768 if (!MRI.hasOneNonDBGUse(CondDef))
lib/Target/AMDGPU/SIInstrInfo.cpp 2308 if (!MRI->hasOneNonDBGUse(Reg))
2417 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
2500 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 178 if (MRI.hasOneNonDBGUse(AddrOp->getReg()))
lib/Target/ARM/ARMBaseInstrInfo.cpp 2181 if (!MRI.hasOneNonDBGUse(Reg))
3212 if (!MRI->hasOneNonDBGUse(Reg))
lib/Target/ARM/MLxExpansionPass.cpp 118 if (Register::isPhysicalRegister(Reg) || !MRI->hasOneNonDBGUse(Reg))
128 if (Register::isPhysicalRegister(Reg) || !MRI->hasOneNonDBGUse(Reg))
301 bool AccKill = MRI->hasOneNonDBGUse(AccReg);
lib/Target/Lanai/LanaiInstrInfo.cpp 461 if (!MRI.hasOneNonDBGUse(Reg))
lib/Target/NVPTX/NVPTXPeephole.cpp 120 if (MRI.hasOneNonDBGUse(Prev.getOperand(0).getReg())) {
lib/Target/PowerPC/PPCInstrInfo.cpp 1383 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
lib/Target/PowerPC/PPCMIPeephole.cpp 490 if (MRI->hasOneNonDBGUse(ShiftRes)) {
533 MRI->hasOneNonDBGUse(RoundInstr->getOperand(0).getReg())) {
577 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg()))
621 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg()))
726 MRI->hasOneNonDBGUse(DefPhiMI->getOperand(0).getReg());
743 || !MRI->hasOneNonDBGUse(LiMI->getOperand(0).getReg()) ||
952 if (!Register::isVirtualRegister(CndReg) || !MRI->hasOneNonDBGUse(CndReg))
1426 if (!MRI->hasOneNonDBGUse(SrcReg))
lib/Target/PowerPC/PPCReduceCRLogicals.cpp 474 MRI->hasOneNonDBGUse(Def1->getOperand(0).getReg());
476 MRI->hasOneNonDBGUse(Ret.CopyDefs.first->getOperand(0).getReg());
484 MRI->hasOneNonDBGUse(Def2->getOperand(0).getReg());
486 MRI->hasOneNonDBGUse(Ret.CopyDefs.second->getOperand(0).getReg());
509 Ret.SingleUse = MRI->hasOneNonDBGUse(MIParam.getOperand(0).getReg()) ? 1 : 0;
lib/Target/SystemZ/SystemZInstrInfo.cpp 661 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 443 assert(MRI.hasOneNonDBGUse(DefReg));
lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp 101 MRI.hasOneNonDBGUse(Def->getOperand(0).getReg())) {
lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp 542 if (!MRI->hasOneNonDBGUse(DefVR))
lib/Target/X86/X86CallFrameOptimization.cpp 615 if (!MRI->hasOneNonDBGUse(Reg))