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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Mips/MipsGenGlobalISel.inc12638 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SREM,
include/llvm/CodeGen/GlobalISel/ConstantFoldingMIRBuilder.h 46 case TargetOpcode::G_SREM: {
include/llvm/CodeGen/GlobalISel/IRTranslator.h 382 return translateBinaryOp(TargetOpcode::G_SREM, U, MIRBuilder);
lib/CodeGen/GlobalISel/CSEInfo.cpp 47 case TargetOpcode::G_SREM:
lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp 156 case TargetOpcode::G_SREM: {
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 266 case TargetOpcode::G_SREM:
502 case TargetOpcode::G_SREM:
1566 case TargetOpcode::G_SREM:
1916 case TargetOpcode::G_SREM:
1919 MIRBuilder.buildInstr(MI.getOpcode() == G_SREM ? G_SDIV : G_UDIV)
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp 977 case TargetOpcode::G_SREM:
lib/CodeGen/GlobalISel/Utils.cpp 380 case TargetOpcode::G_SREM:
lib/Target/AArch64/AArch64LegalizerInfo.cpp 137 getActionDefinitionsBuilder({G_SREM, G_UREM})
lib/Target/ARM/ARMLegalizerInfo.cpp 118 for (unsigned Op : {G_SREM, G_UREM}) {
372 case G_SREM:
380 MI.getOpcode() == G_SREM ? RTLIB::SDIVREM_I32 : RTLIB::UDIVREM_I32;
lib/Target/Mips/MipsInstructionSelector.cpp 423 case G_SREM: {
425 bool IsSigned = I.getOpcode() == G_SREM || I.getOpcode() == G_SDIV;
lib/Target/Mips/MipsLegalizerInfo.cpp 144 getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UDIV, G_UREM})
413 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SREM, MIRBuilder, ST);
lib/Target/Mips/MipsRegisterBankInfo.cpp 460 case G_SREM:
lib/Target/X86/X86InstructionSelector.cpp 383 case TargetOpcode::G_SREM:
1521 I.getOpcode() == TargetOpcode::G_SREM ||
1619 case TargetOpcode::G_SREM:
lib/Target/X86/X86LegalizerInfo.cpp 155 {G_SDIV, G_SREM, G_UDIV, G_UREM})
266 {G_SDIV, G_SREM, G_UDIV, G_UREM})
unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp 228 ConstantFoldBinOp(TargetOpcode::G_SREM, MIBCst1->getOperand(0).getReg(),
233 ConstantFoldBinOp(TargetOpcode::G_SREM, MIBCst1->getOperand(0).getReg(),