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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 349 return isUInt<16>(Imm);
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc73175 assert(isUInt<16>(V));
gen/lib/Target/Mips/MipsGenDAGISel.inc30195 return isUInt<16>(N->getZExtValue());
30420 return isUInt<16>(N->getZExtValue()) && !isInt<16>(N->getSExtValue());
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc30284 return isUInt<16>(N->getZExtValue());
include/llvm/ADT/PointerEmbeddedInt.h 64 assert((std::is_signed<IntT>::value ? isInt<Bits>(I) : isUInt<Bits>(I)) &&
include/llvm/Support/MathExtras.h 398 return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
lib/CodeGen/MIRParser/MIParser.cpp 1508 return Size != 0 && isUInt<16>(Size);
1512 return NumElts != 0 && isUInt<16>(NumElts);
lib/IR/DataLayout.cpp 353 if (!isUInt<16>(ABIAlign))
365 if (!isUInt<16>(PrefAlign))
lib/MC/MCDwarf.cpp 1932 } else if (isUInt<16>(AddrDelta)) {
lib/Target/AArch64/AArch64CompressJumpTables.cpp 126 } else if (isUInt<16>(Span / 4)) {
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 1154 if ((OffsetBits == 16 && !isUInt<16>(Offset)) ||
1184 if (isUInt<16>(ByteOffset)) {
1223 if (isUInt<16>(CAddr->getZExtValue())) {
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 2095 if ((OffsetBits == 16 && !isUInt<16>(Offset)) ||
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 326 bool isOffset() const { return isImmTy(ImmTyOffset) && isUInt<16>(getImm()); }
5019 if (ImmVal < 0 || !isUInt<16>(ImmVal))
5118 if (ImmVal < 0 || !isUInt<16>(ImmVal))
5588 if (!isUInt<16>(Imm)) {
6433 return isImm() && (isInt<16>(getImm()) || isUInt<16>(getImm()));
6437 return isImm() && isUInt<16>(getImm());
7021 if (!isUInt<16>(Imm)) {
lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp 53 if (isInt<16>(Imm) || isUInt<16>(Imm))
546 if (!isUInt<16>(Op.getImm()) &&
lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp 263 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])
lib/Target/AMDGPU/SIFoldOperands.cpp 223 if (!isUInt<16>(Fold.ImmToFold)) {
lib/Target/AMDGPU/SIISelLowering.cpp 1199 if (!isUInt<16>(AM.BaseOffs))
lib/Target/AMDGPU/SIInstrInfo.cpp 2865 if (isInt<16>(Imm) || isUInt<16>(Imm)) {
3556 if (!isUInt<16>(Imm)) {
lib/Target/AMDGPU/SIShrinkInstructions.cpp 135 return isUInt<16>(Src.getImm()) &&
148 if (isUInt<16>(Src.getImm())) {
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp 1204 if (isInt<16>(Literal) || isUInt<16>(Literal)) {
lib/Target/ARM/ARMFastISel.cpp 471 if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) {
lib/Target/ARM/ARMISelLowering.cpp 9722 } else if (Subtarget->hasV6T2Ops() && isUInt<16>(NumLPads)) {
lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp 269 return isUInt<16>(static_cast<int32_t>(Value));
lib/Target/Lanai/LanaiISelLowering.cpp 316 if (isUInt<16>(C->getZExtValue())) {
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 1267 return isConstantImm() ? isUInt<Bits>(getConstantImm()) : isImm();
1272 isUInt<Bits>(getConstantImm()))
2493 if (isUInt<16>(ImmValue))
2601 return (x == x >> BitNum << BitNum) && isUInt<N>(x >> BitNum);
2671 if (isUInt<16>(ImmValue)) {
5190 if (!isUInt<16>(Imm)) {
lib/Target/Mips/Mips16ISelLowering.cpp 734 else if ((!ImmSigned && isUInt<16>(imm)) ||
lib/Target/Mips/MipsFastISel.cpp 372 } else if (isUInt<16>(Imm)) {
lib/Target/Mips/MipsISelLowering.cpp 4058 if (isUInt<16>(Val)) {
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 337 return isUInt<16>(getImmU16Context());
lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp 182 assert(isUInt<N>(Imm) && "Invalid immediate");
190 assert(isUInt<N>(Imm) && "Invalid immediate");
lib/Target/PowerPC/PPCFastISel.cpp 848 if ((IsZExt && isUInt<16>(Imm)) || (!IsZExt && isInt<16>(Imm)))
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 3688 if (isUInt<16>(Imm))
3714 if (isInt32Immediate(RHS, Imm) && isUInt<16>(Imm))
3732 if (isUInt<16>(Imm))
3761 if (isInt64Immediate(RHS.getNode(), Imm) && isUInt<16>(Imm))
lib/Target/PowerPC/PPCISelLowering.cpp14433 if (isUInt<16>(Value))
14903 return isInt<16>(Imm) || isUInt<16>(Imm);
14907 return isInt<16>(Imm) || isUInt<16>(Imm);
15458 return isUInt<16>(ConstVal) ||
15459 (isUInt<16>(ConstVal >> 16) && !(ConstVal & 0xFFFF));
lib/Target/PowerPC/PPCInstrInfo.cpp 2897 (Opc == PPC::RLDICLo && isUInt<16>(InVal.getSExtValue()))) {
2923 isUInt<16>(InVal.getSExtValue()));
lib/Target/PowerPC/PPCTargetTransformInfo.cpp 195 if (UnsignedFree && isUInt<16>(Imm.getZExtValue()))
lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp 173 if (!isUInt<N>(Imm))
181 if (!isUInt<N>(Imm))
252 assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp 68 assert(isUInt<N>(Value) && "Invalid uimm argument");
lib/Target/SystemZ/SystemZISelLowering.cpp 855 (isInt<16>(C->getSExtValue()) || isUInt<16>(C->getZExtValue())))
2105 isUInt<16>(ConstOp1->getZExtValue()))
lib/Target/SystemZ/SystemZTargetTransformInfo.cpp 980 if (isUInt<16>(CI->getZExtValue()))
lib/Target/X86/AsmParser/X86AsmParserCommon.h 18 (isUInt<16>(Value) && isInt<8>(static_cast<int16_t>(Value)));
lib/Target/X86/X86ExpandPseudo.cpp 315 } else if (isUInt<16>(StackAdj)) {
lib/Target/X86/X86FastISel.cpp 1172 if (!isUInt<16>(X86MFInfo->getBytesToPopOnReturn()))
lib/Target/X86/X86ISelDAGToDAG.cpp 5058 } else if (OptForMinSize && isUInt<16>(Mask) &&
lib/Target/XCore/XCoreISelDAGToDAG.cpp 145 else if (!isUInt<16>(Val)) {
utils/TableGen/DAGISelMatcherEmitter.cpp 245 assert(isUInt<16>(VecPatterns.size()) &&
678 assert(isUInt<16>(Reg->EnumValue) && "not handled");