reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/ADT/DenseMap.h

  798       NewNumBuckets = std::max(64, 1 << (Log2_32_Ceil(OldNumEntries) + 1));
 1068       NewNumBuckets = 1 << (Log2_32_Ceil(OldSize) + 1);

include/llvm/CodeGen/ValueTypes.h

  321       return getIntegerVT(Context, 1 << Log2_32_Ceil(BitWidth));
  368         unsigned Pow2NElts = 1 <<  Log2_32_Ceil(NElts);

include/llvm/Support/MachineValueType.h

  415       unsigned Pow2NElts = 1 << Log2_32_Ceil(NElts);

lib/Analysis/InstructionSimplify.cpp

 1236   unsigned NumValidShiftBits = Log2_32_Ceil(Known.getBitWidth());

lib/Bitcode/Writer/BitcodeWriter.cpp

 1213                               Log2_32_Ceil(MaxGlobalType+1)));
 1224                                Log2_32_Ceil(MaxEncAlignment+1)));
 1230                                Log2_32_Ceil(SectionMap.size()+1)));
 2282     Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, Log2_32_Ceil(LastVal+1)));
 3425                               Log2_32_Ceil(VE.getTypes().size() + 1)));

lib/Bitcode/Writer/ValueEnumerator.cpp

 1040   return Log2_32_Ceil(getTypes().size() + 1);

lib/CodeGen/GlobalISel/LegalizeMutations.cpp

   51         std::max(1u << Log2_32_Ceil(Ty.getScalarSizeInBits()), Min);
   61         std::max(1u << Log2_32_Ceil(VecTy.getNumElements()), Min);

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  376       ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits()))
 3200            Log2_32_Ceil(VT.getScalarSizeInBits()) &&

lib/CodeGen/SelectionDAG/LegalizeTypes.cpp

 1061       Log2_32_Ceil(Op.getValueType().getSizeInBits());

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 5154     assert(N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) &&

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 3153     else if (ShiftSize >= Log2_32_Ceil(Op2.getValueSizeInBits()))

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 3114          N0.getValueSizeInBits() > Log2_32_Ceil(CTPOP.getValueSizeInBits()))) {

lib/MC/MCWinCOFFStreamer.cpp

  288        << Log2_32_Ceil(ByteAlignment);

lib/Support/SmallPtrSet.cpp

   30   CurArraySize = Size > 16 ? 1 << (Log2_32_Ceil(Size) + 1) : 32;

lib/Target/AArch64/AArch64LegalizerInfo.cpp

  511                                        << Log2_32_Ceil(Ty.getSizeInBits() + 1);

lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def

  148     Idx += Log2_32_Ceil(Size);
  152   assert(Log2_32_Ceil(Size) == Log2_32_Ceil(ValMappings[Idx].BreakDown->Length));
  152   assert(Log2_32_Ceil(Size) == Log2_32_Ceil(ValMappings[Idx].BreakDown->Length));

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

 1058         unsigned NewSizeInBits = 1 << Log2_32_Ceil(Ty.getSizeInBits() + 1);

lib/Target/AMDGPU/SIISelLowering.cpp

  898   Pow2Elts = 1 << Log2_32_Ceil(NumElts + AdditionalElts);

lib/Target/SystemZ/SystemZISelLowering.cpp

 3594   int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits);

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  318     assert(BitWidth >= Log2_32_Ceil(VT.getSizeInBits()) &&

lib/Transforms/InstCombine/InstCombineCalls.cpp

 2004     APInt Op2Demanded = APInt::getLowBitsSet(BitWidth, Log2_32_Ceil(BitWidth));

lib/Transforms/Instrumentation/MemorySanitizer.cpp

 1008   return Log2_32_Ceil((TypeSize + 7) / 8);

tools/clang/lib/Driver/ToolChains/CommonArgs.cpp

 1138   return Value ? llvm::Log2_32_Ceil(std::min(Value, 65536u)) : Value;

utils/TableGen/AsmWriterEmitter.cpp

  329   unsigned AsmStrBits = Log2_32_Ceil(MaxStringIdx+2);
  349     unsigned NumBits = Log2_32_Ceil(UniqueOperandCommands.size());
  434     unsigned NumBits = Log2_32_Ceil(Commands.size());