|
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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenCallingConv.inc 65 LocVT == MVT::v4f16 ||
315 LocVT == MVT::v4f16) {
369 LocVT == MVT::v4f16) {
559 LocVT == MVT::v4f16) {
630 LocVT == MVT::v4f16) {
714 LocVT == MVT::v4f16) {
796 LocVT == MVT::v4f16) {
1025 LocVT == MVT::v4f16 ||
1128 LocVT == MVT::v4f16) {
gen/lib/Target/AArch64/AArch64GenDAGISel.inc70225 /*168462*/ OPC_CheckChild0Type, MVT::v4f16,
70835 /*169774*/ OPC_CheckChild1Type, MVT::v4f16,
71621 /*171390*/ OPC_CheckChild0Type, MVT::v4f16,
72127 /*172369*/ OPC_CheckChild0Type, MVT::v4f16,
72682 /*173402*/ OPC_CheckChild1Type, MVT::v4f16,
74431 /*176675*/ OPC_CheckChild1Type, MVT::v4f16,
74610 /*177009*/ OPC_CheckChild1Type, MVT::v4f16,
75079 /*177860*/ OPC_CheckChild1Type, MVT::v4f16,
75221 /*178130*/ OPC_CheckChild1Type, MVT::v4f16,
75850 /*179258*/ OPC_CheckChild1Type, MVT::v4f16,
75946 /*179429*/ OPC_CheckChild1Type, MVT::v4f16,
76042 /*179600*/ OPC_CheckChild1Type, MVT::v4f16,
76138 /*179771*/ OPC_CheckChild1Type, MVT::v4f16,
76234 /*179942*/ OPC_CheckChild1Type, MVT::v4f16,
76330 /*180113*/ OPC_CheckChild1Type, MVT::v4f16,
76426 /*180284*/ OPC_CheckChild1Type, MVT::v4f16,
76522 /*180455*/ OPC_CheckChild1Type, MVT::v4f16,
76606 /*180615*/ OPC_CheckChild1Type, MVT::v4f16,
76608 /*180618*/ OPC_CheckChild2Type, MVT::v4f16,
76697 /*180794*/ OPC_CheckChild1Type, MVT::v4f16,
76699 /*180797*/ OPC_CheckChild2Type, MVT::v4f16,
78316 /*184013*/ OPC_CheckType, MVT::v4f16,
78320 MVT::v4f16, 2/*#Ops*/, 0, 2,
78540 /*184414*/ OPC_CheckChild1Type, MVT::v4f16,
78551 /*184433*/ OPC_CheckType, MVT::v4f16,
78553 /*184436*/ OPC_CheckType, MVT::v4f16,
78557 MVT::v4f16, 3/*#Ops*/, 0, 1, 3,
78656 /*184624*/ OPC_SwitchType /*2 cases */, 19, MVT::v4f16,// ->184646
78659 /*184629*/ OPC_CheckChild2Type, MVT::v4f16,
78660 /*184631*/ OPC_CheckType, MVT::v4f16,
78664 MVT::v4f16, 3/*#Ops*/, 2, 0, 3,
78734 /*184768*/ OPC_SwitchType /*6 cases */, 15, MVT::v4f16,// ->184786
78735 /*184771*/ OPC_CheckChild1Type, MVT::v4f16,
78737 /*184774*/ OPC_CheckChild2Type, MVT::v4f16,
78740 MVT::v4f16, 2/*#Ops*/, 0, 1,
78890 /*185065*/ OPC_CheckType, MVT::v4f16,
78894 MVT::v4f16, 2/*#Ops*/, 0, 2,
78981 /*185229*/ /*SwitchType*/ 11, MVT::v4f16,// ->185242
78982 /*185231*/ OPC_CheckChild1Type, MVT::v4f16,
78985 MVT::v4f16, 1/*#Ops*/, 0,
79087 /*185428*/ /*SwitchType*/ 15, MVT::v4f16,// ->185445
79088 /*185430*/ OPC_CheckChild1Type, MVT::v4f16,
79090 /*185433*/ OPC_CheckChild2Type, MVT::v4f16,
79093 MVT::v4f16, 2/*#Ops*/, 0, 1,
79172 /*185589*/ /*SwitchType*/ 15, MVT::v4f16,// ->185606
79173 /*185591*/ OPC_CheckChild1Type, MVT::v4f16,
79175 /*185594*/ OPC_CheckChild2Type, MVT::v4f16,
79178 MVT::v4f16, 2/*#Ops*/, 0, 1,
79256 /*185745*/ /*SwitchType*/ 11, MVT::v4f16,// ->185758
79257 /*185747*/ OPC_CheckChild1Type, MVT::v4f16,
79260 MVT::v4f16, 1/*#Ops*/, 0,
79341 /*185901*/ /*SwitchType*/ 11, MVT::v4f16,// ->185914
79342 /*185903*/ OPC_CheckChild1Type, MVT::v4f16,
79345 MVT::v4f16, 1/*#Ops*/, 0,
79438 /*186086*/ OPC_CheckChild1Type, MVT::v4f16,
79479 /*186158*/ OPC_CheckChild1Type, MVT::v4f16,
79520 /*186230*/ OPC_CheckChild1Type, MVT::v4f16,
79561 /*186302*/ OPC_CheckChild1Type, MVT::v4f16,
82482 /*191670*/ OPC_CheckChild2Type, MVT::v4f16,
82494 /*191691*/ OPC_CheckType, MVT::v4f16,
82505 /*191712*/ OPC_CheckChild3Type, MVT::v4f16,
82554 /*191802*/ OPC_CheckChild2Type, MVT::v4f16,
82566 /*191823*/ OPC_CheckType, MVT::v4f16,
82577 /*191844*/ OPC_CheckChild3Type, MVT::v4f16,
82626 /*191934*/ OPC_CheckChild2Type, MVT::v4f16,
82638 /*191955*/ OPC_CheckType, MVT::v4f16,
82649 /*191976*/ OPC_CheckChild3Type, MVT::v4f16,
82698 /*192066*/ OPC_CheckChild2Type, MVT::v4f16,
82710 /*192087*/ OPC_CheckType, MVT::v4f16,
82721 /*192108*/ OPC_CheckChild3Type, MVT::v4f16,
82777 /*192210*/ OPC_SwitchType /*6 cases */, 15, MVT::v4f16,// ->192228
82778 /*192213*/ OPC_CheckChild1Type, MVT::v4f16,
82780 /*192216*/ OPC_CheckChild2Type, MVT::v4f16,
82783 MVT::v4f16, 2/*#Ops*/, 0, 1,
82834 /*192317*/ OPC_SwitchType /*5 cases */, 15, MVT::v4f16,// ->192335
82835 /*192320*/ OPC_CheckChild1Type, MVT::v4f16,
82837 /*192323*/ OPC_CheckChild2Type, MVT::v4f16,
82840 MVT::v4f16, 2/*#Ops*/, 0, 1,
82883 /*192409*/ OPC_SwitchType /*5 cases */, 15, MVT::v4f16,// ->192427
82884 /*192412*/ OPC_CheckChild1Type, MVT::v4f16,
82886 /*192415*/ OPC_CheckChild2Type, MVT::v4f16,
82889 MVT::v4f16, 2/*#Ops*/, 0, 1,
82932 /*192501*/ OPC_SwitchType /*5 cases */, 15, MVT::v4f16,// ->192519
82933 /*192504*/ OPC_CheckChild1Type, MVT::v4f16,
82935 /*192507*/ OPC_CheckChild2Type, MVT::v4f16,
82938 MVT::v4f16, 2/*#Ops*/, 0, 1,
82981 /*192593*/ OPC_SwitchType /*5 cases */, 15, MVT::v4f16,// ->192611
82982 /*192596*/ OPC_CheckChild1Type, MVT::v4f16,
82984 /*192599*/ OPC_CheckChild2Type, MVT::v4f16,
82987 MVT::v4f16, 2/*#Ops*/, 0, 1,
83030 /*192685*/ OPC_SwitchType /*5 cases */, 15, MVT::v4f16,// ->192703
83031 /*192688*/ OPC_CheckChild1Type, MVT::v4f16,
83033 /*192691*/ OPC_CheckChild2Type, MVT::v4f16,
83036 MVT::v4f16, 2/*#Ops*/, 0, 1,
84938 /*196637*/ /*SwitchType*/ 60, MVT::v4f16,// ->196699
84944 MVT::v4f16, 4/*#Ops*/, 2, 3, 4, 5,
84951 MVT::v4f16, 4/*#Ops*/, 2, 3, 4, 5,
84958 MVT::v4f16, 2/*#Ops*/, 2, 3,
84965 MVT::v4f16, 2/*#Ops*/, 2, 3,
94185 /*214021*/ OPC_CheckChild0Type, MVT::v4f16,
94497 /*214599*/ OPC_CheckChild0Type, MVT::v4f16,
99336 /*223807*/ OPC_CheckChild0Type, MVT::v4f16,
99403 /*223933*/ OPC_CheckChild0Type, MVT::v4f16,
99470 /*224059*/ OPC_CheckChild0Type, MVT::v4f16,
99978 /*224963*/ /*SwitchType*/ 18, MVT::v4f16,// ->224983
99987 MVT::v4f16, 1/*#Ops*/, 0,
100090 /*225148*/ /*SwitchType*/ 3, MVT::v4f16,// ->225153
100193 /*225318*/ /*SwitchType*/ 18, MVT::v4f16,// ->225338
100202 MVT::v4f16, 1/*#Ops*/, 0,
100225 /*225366*/ OPC_CheckChild0Type, MVT::v4f16,
100403 /*225663*/ /*SwitchType*/ 18, MVT::v4f16,// ->225683
100412 MVT::v4f16, 1/*#Ops*/, 0,
100494 /*225809*/ /*SwitchType*/ 18, MVT::v4f16,// ->225829
100503 MVT::v4f16, 1/*#Ops*/, 0,
100572 /*225932*/ /*SwitchType*/ 18, MVT::v4f16,// ->225952
100581 MVT::v4f16, 1/*#Ops*/, 0,
100662 /*226076*/ /*SwitchType*/ 18, MVT::v4f16,// ->226096
100671 MVT::v4f16, 1/*#Ops*/, 0,
101400 /*227323*/ /*SwitchType*/ 37, MVT::v4f16,// ->227362
101405 MVT::v4f16, 2/*#Ops*/, 0, 1,
101414 MVT::v4f16, 1/*#Ops*/, 2,
103515 /*231459*/ OPC_SwitchType /*5 cases */, 11, MVT::v4f16,// ->231473
103518 MVT::v4f16, 3/*#Ops*/, 2, 0, 1,
103670 /*231813*/ OPC_SwitchType /*5 cases */, 11, MVT::v4f16,// ->231827
103673 MVT::v4f16, 3/*#Ops*/, 2, 1, 0,
104095 /*232857*/ OPC_CheckType, MVT::v4f16,
104098 MVT::v4f16, 1/*#Ops*/, 0,
104612 /*234281*/ OPC_CheckType, MVT::v4f16,
104615 MVT::v4f16, 1/*#Ops*/, 0,
104751 /*234541*/ /*SwitchType*/ 10, MVT::v4f16,// ->234553
104754 MVT::v4f16, 2/*#Ops*/, 0, 1,
104936 /*234909*/ /*SwitchType*/ 10, MVT::v4f16,// ->234921
104939 MVT::v4f16, 2/*#Ops*/, 0, 1,
105114 /*235235*/ OPC_SwitchType /*2 cases */, 13, MVT::v4f16,// ->235251
105118 MVT::v4f16, 3/*#Ops*/, 0, 1, 3,
105186 /*235372*/ OPC_SwitchType /*2 cases */, 13, MVT::v4f16,// ->235388
105190 MVT::v4f16, 3/*#Ops*/, 2, 0, 3,
105342 /*235722*/ OPC_SwitchType /*5 cases */, 10, MVT::v4f16,// ->235735
105345 MVT::v4f16, 2/*#Ops*/, 0, 1,
105466 /*235961*/ /*SwitchType*/ 9, MVT::v4f16,// ->235972
105469 MVT::v4f16, 1/*#Ops*/, 0,
105567 /*236147*/ /*SwitchType*/ 10, MVT::v4f16,// ->236159
105570 MVT::v4f16, 2/*#Ops*/, 0, 1,
105582 /*236174*/ OPC_SwitchType /*5 cases */, 9, MVT::v4f16,// ->236186
105585 MVT::v4f16, 1/*#Ops*/, 0,
105730 /*236455*/ OPC_CheckType, MVT::v4f16,
105732 MVT::v4f16, 1/*#Ops*/, 0,
105775 /*236535*/ /*SwitchType*/ 14, MVT::v4f16,// ->236551
105794 /*236568*/ OPC_CheckChild0Type, MVT::v4f16,
105821 /*236617*/ /*SwitchType*/ 9, MVT::v4f16,// ->236628
105824 MVT::v4f16, 1/*#Ops*/, 0,
105872 /*236711*/ /*SwitchType*/ 9, MVT::v4f16,// ->236722
105875 MVT::v4f16, 1/*#Ops*/, 0,
105923 /*236805*/ /*SwitchType*/ 9, MVT::v4f16,// ->236816
105926 MVT::v4f16, 1/*#Ops*/, 0,
105974 /*236899*/ /*SwitchType*/ 9, MVT::v4f16,// ->236910
105977 MVT::v4f16, 1/*#Ops*/, 0,
106025 /*236993*/ /*SwitchType*/ 9, MVT::v4f16,// ->237004
106028 MVT::v4f16, 1/*#Ops*/, 0,
106076 /*237087*/ /*SwitchType*/ 9, MVT::v4f16,// ->237098
106079 MVT::v4f16, 1/*#Ops*/, 0,
106127 /*237181*/ /*SwitchType*/ 9, MVT::v4f16,// ->237192
106130 MVT::v4f16, 1/*#Ops*/, 0,
106184 /*237289*/ /*SwitchType*/ 10, MVT::v4f16,// ->237301
106187 MVT::v4f16, 2/*#Ops*/, 0, 1,
106241 /*237402*/ /*SwitchType*/ 10, MVT::v4f16,// ->237414
106244 MVT::v4f16, 2/*#Ops*/, 0, 1,
106298 /*237515*/ /*SwitchType*/ 10, MVT::v4f16,// ->237527
106301 MVT::v4f16, 2/*#Ops*/, 0, 1,
106355 /*237628*/ /*SwitchType*/ 10, MVT::v4f16,// ->237640
106358 MVT::v4f16, 2/*#Ops*/, 0, 1,
106407 /*237731*/ /*SwitchType*/ 10, MVT::v4f16,// ->237743
106410 MVT::v4f16, 2/*#Ops*/, 0, 1,
107055 /*239217*/ OPC_SwitchType /*2 cases */, 68, MVT::v4f16,// ->239288
107060 MVT::v4f16, 0/*#Ops*/, // Results = #6
107065 MVT::v4f16, 3/*#Ops*/, 6, 7, 8,
107072 MVT::v4f16, 0/*#Ops*/, // Results = #6
107077 MVT::v4f16, 3/*#Ops*/, 6, 7, 8,
107219 /*239632*/ OPC_SwitchType /*2 cases */, 18, MVT::v4f16,// ->239653
107221 MVT::v4f16, 0/*#Ops*/, // Results = #1
107224 MVT::v4f16, 3/*#Ops*/, 1, 0, 2,
107534 /*240317*/ OPC_CheckType, MVT::v4f16,
107540 MVT::v4f16, 2/*#Ops*/, 3, 4,
107590 /*240433*/ OPC_CheckType, MVT::v4f16,
107601 MVT::v4f16, 2/*#Ops*/, 8, 9,
107661 /*240601*/ OPC_SwitchType /*6 cases */, 11, MVT::v4f16,// ->240615
107664 MVT::v4f16, 3/*#Ops*/, 0, 1, 3,
109833 /*245300*/ /*SwitchType*/ 40, MVT::v4f16,// ->245342
109844 MVT::v4f16, 2/*#Ops*/, 9, 10,
109917 /*245500*/ OPC_CheckChild0Type, MVT::v4f16,
109939 /*245549*/ /*SwitchType*/ 55, MVT::v4f16,// ->245606
109954 MVT::v4f16, 2/*#Ops*/, 12, 13,
110111 /*245963*/ /*SwitchType*/ 38, MVT::v4f16,// ->246003
110122 MVT::v4f16, 2/*#Ops*/, 8, 9,
110154 /*246064*/ OPC_CheckType, MVT::v4f16,
110171 MVT::v4f16, 2/*#Ops*/, 11, 12,
110718 /*247288*/ OPC_SwitchType /*2 cases */, 8, MVT::v4f16,// ->247299
110721 MVT::v4f16, 1/*#Ops*/, 1,
110781 /*247434*/ OPC_SwitchType /*2 cases */, 29, MVT::v4f16,// ->247466
110789 MVT::v4f16, 2/*#Ops*/, 3, 4,
111301 /*248528*/ /*SwitchType*/ 11, MVT::v4f16,// ->248541
111304 MVT::v4f16, 2/*#Ops*/, 0, 1,
111338 /*248616*/ /*SwitchType*/ 23, MVT::v4f16,// ->248641
111344 MVT::v4f16, 2/*#Ops*/, 2, 3,
111543 /*249063*/ OPC_SwitchType /*2 cases */, 10, MVT::v4f16,// ->249076
111546 MVT::v4f16, 2/*#Ops*/, 0, 2,
111889 /*249760*/ /*SwitchType*/ 3, MVT::v4f16,// ->249765
111916 /*249795*/ /*SwitchType*/ 3, MVT::v4f16,// ->249800
111939 /*249825*/ /*SwitchType*/ 3, MVT::v4f16,// ->249830
111966 /*249860*/ /*SwitchType*/ 3, MVT::v4f16,// ->249865
112468 /*250661*/ OPC_CheckChild0Type, MVT::v4f16,
112513 /*250745*/ OPC_CheckChild0Type, MVT::v4f16,
112558 /*250829*/ OPC_CheckChild0Type, MVT::v4f16,
112603 /*250913*/ OPC_CheckChild0Type, MVT::v4f16,
112648 /*250997*/ OPC_CheckChild0Type, MVT::v4f16,
112774 /*251229*/ /*SwitchType*/ 7, MVT::v4f16,// ->251238
112776 MVT::v4f16, 1/*#Ops*/, 0,
112823 /*251319*/ /*SwitchType*/ 7, MVT::v4f16,// ->251328
112825 MVT::v4f16, 1/*#Ops*/, 0,
113455 /*252576*/ /*SwitchType*/ 10, MVT::v4f16,// ->252588
113458 MVT::v4f16, 2/*#Ops*/, 0, 1,
113531 /*252728*/ /*SwitchType*/ 10, MVT::v4f16,// ->252740
113534 MVT::v4f16, 2/*#Ops*/, 0, 1,
113607 /*252880*/ /*SwitchType*/ 10, MVT::v4f16,// ->252892
113610 MVT::v4f16, 2/*#Ops*/, 0, 1,
113683 /*253032*/ /*SwitchType*/ 10, MVT::v4f16,// ->253044
113686 MVT::v4f16, 2/*#Ops*/, 0, 1,
113759 /*253184*/ /*SwitchType*/ 10, MVT::v4f16,// ->253196
113762 MVT::v4f16, 2/*#Ops*/, 0, 1,
113835 /*253336*/ /*SwitchType*/ 10, MVT::v4f16,// ->253348
113838 MVT::v4f16, 2/*#Ops*/, 0, 1,
114486 /*254900*/ /*SwitchType*/ 11, MVT::v4f16,// ->254913
114490 MVT::v4f16, 1/*#Ops*/, 1,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 742 case MVT::v4f16: return fastEmit_AArch64ISD_FCMEQz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
810 case MVT::v4f16: return fastEmit_AArch64ISD_FCMGEz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
878 case MVT::v4f16: return fastEmit_AArch64ISD_FCMGTz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
946 case MVT::v4f16: return fastEmit_AArch64ISD_FCMLEz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1014 case MVT::v4f16: return fastEmit_AArch64ISD_FCMLTz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1319 if (RetVT.SimpleTy != MVT::v4f16)
1336 case MVT::v4f16: return fastEmit_AArch64ISD_REV32_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1399 if (RetVT.SimpleTy != MVT::v4f16)
1430 case MVT::v4f16: return fastEmit_AArch64ISD_REV64_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1806 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4f16_r(Op0, Op0IsKill);
1867 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4f16_r(Op0, Op0IsKill);
2076 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4f16_r(Op0, Op0IsKill);
2168 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4f16_r(Op0, Op0IsKill);
2368 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4f16_r(Op0, Op0IsKill);
2460 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v4f16_r(Op0, Op0IsKill);
2523 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2732 if (RetVT.SimpleTy != MVT::v4f16)
2781 case MVT::v4f16: return fastEmit_ISD_FABS_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2820 if (RetVT.SimpleTy != MVT::v4f16)
2869 case MVT::v4f16: return fastEmit_ISD_FCEIL_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2908 if (RetVT.SimpleTy != MVT::v4f16)
2957 case MVT::v4f16: return fastEmit_ISD_FFLOOR_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2996 if (RetVT.SimpleTy != MVT::v4f16)
3045 case MVT::v4f16: return fastEmit_ISD_FNEARBYINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3084 if (RetVT.SimpleTy != MVT::v4f16)
3133 case MVT::v4f16: return fastEmit_ISD_FNEG_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3191 case MVT::v4f16: return fastEmit_ISD_FP_EXTEND_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3231 if (RetVT.SimpleTy != MVT::v4f16)
3370 case MVT::v4f16: return fastEmit_ISD_FP_TO_SINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3497 case MVT::v4f16: return fastEmit_ISD_FP_TO_UINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3536 if (RetVT.SimpleTy != MVT::v4f16)
3585 case MVT::v4f16: return fastEmit_ISD_FRINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3624 if (RetVT.SimpleTy != MVT::v4f16)
3673 case MVT::v4f16: return fastEmit_ISD_FROUND_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3712 if (RetVT.SimpleTy != MVT::v4f16)
3761 case MVT::v4f16: return fastEmit_ISD_FSQRT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3800 if (RetVT.SimpleTy != MVT::v4f16)
3849 case MVT::v4f16: return fastEmit_ISD_FTRUNC_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
4018 if (RetVT.SimpleTy != MVT::v4f16)
4183 if (RetVT.SimpleTy != MVT::v4f16)
4816 case MVT::v4f16: return fastEmit_AArch64ISD_FCMEQ_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4904 case MVT::v4f16: return fastEmit_AArch64ISD_FCMGE_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4992 case MVT::v4f16: return fastEmit_AArch64ISD_FCMGT_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5221 if (RetVT.SimpleTy != MVT::v4f16)
5274 case MVT::v4f16: return fastEmit_AArch64ISD_TRN1_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5349 if (RetVT.SimpleTy != MVT::v4f16)
5402 case MVT::v4f16: return fastEmit_AArch64ISD_TRN2_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5506 if (RetVT.SimpleTy != MVT::v4f16)
5559 case MVT::v4f16: return fastEmit_AArch64ISD_UZP1_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5634 if (RetVT.SimpleTy != MVT::v4f16)
5687 case MVT::v4f16: return fastEmit_AArch64ISD_UZP2_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5762 if (RetVT.SimpleTy != MVT::v4f16)
5815 case MVT::v4f16: return fastEmit_AArch64ISD_ZIP1_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5890 if (RetVT.SimpleTy != MVT::v4f16)
5943 case MVT::v4f16: return fastEmit_AArch64ISD_ZIP2_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6186 if (RetVT.SimpleTy != MVT::v4f16)
6262 case MVT::v4f16: return fastEmit_ISD_FADD_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6304 if (RetVT.SimpleTy != MVT::v4f16)
6353 case MVT::v4f16: return fastEmit_ISD_FDIV_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6392 if (RetVT.SimpleTy != MVT::v4f16)
6447 case MVT::v4f16: return fastEmit_ISD_FMAXIMUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6487 if (RetVT.SimpleTy != MVT::v4f16)
6542 case MVT::v4f16: return fastEmit_ISD_FMAXNUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6582 if (RetVT.SimpleTy != MVT::v4f16)
6637 case MVT::v4f16: return fastEmit_ISD_FMINIMUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6677 if (RetVT.SimpleTy != MVT::v4f16)
6732 case MVT::v4f16: return fastEmit_ISD_FMINNUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6772 if (RetVT.SimpleTy != MVT::v4f16)
6821 case MVT::v4f16: return fastEmit_ISD_FMUL_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6860 if (RetVT.SimpleTy != MVT::v4f16)
6909 case MVT::v4f16: return fastEmit_ISD_FSUB_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
7928 case MVT::v4f16: return fastEmit_AArch64ISD_DUPLANE16_MVT_v8f16_MVT_v4f16_ri_Predicate_VectorIndexH(Op0, Op0IsKill, imm1);
9202 case MVT::v4f16: return fastEmit_AArch64ISD_FMOV_MVT_i32_MVT_v4f16_i_Predicate_imm0_255(imm0);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5183 /* 7 */ MVT::f64, MVT::i64, MVT::v2f32, MVT::v1f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v4f16, MVT::Other,
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc31267 /* 66141*/ /*SwitchType*/ 67, MVT::v4f16,// ->66210
31274 MVT::v4f16, 4/*#Ops*/, 2, 3, 4, 5,
31284 MVT::v4f16, 4/*#Ops*/, 2, 3, 4, 5,
31293 MVT::v4f16, 4/*#Ops*/, 2, 3, 4, 5,
31396 /* 66420*/ OPC_CheckType, MVT::v4f16,
31402 MVT::v4f16, 3/*#Ops*/, 2, 3, 4,
31411 /* 66451*/ OPC_CheckType, MVT::v4f16,
31417 MVT::v4f16, 3/*#Ops*/, 2, 3, 4,
31442 /* 66523*/ /*SwitchType*/ 20, MVT::v4f16,// ->66545
31448 MVT::v4f16, 4/*#Ops*/, 1, 2, 3, 4,
31522 /* 66703*/ /*SwitchType*/ 23, MVT::v4f16,// ->66728
31529 MVT::v4f16, 5/*#Ops*/, 2, 3, 5, 6, 4,
31555 /* 66783*/ /*SwitchType*/ 23, MVT::v4f16,// ->66808
31562 MVT::v4f16, 5/*#Ops*/, 2, 3, 5, 6, 4,
31702 /* 67065*/ OPC_CheckChild1Type, MVT::v4f16,
31718 /* 67096*/ OPC_CheckChild1Type, MVT::v4f16,
33148 /* 70258*/ OPC_CheckChild1Type, MVT::v4f16,
33410 /* 70833*/ OPC_CheckChild1Type, MVT::v4f16,
38161 /* 81405*/ OPC_CheckChild1Type, MVT::v4f16,
39680 /* 85152*/ /*SwitchType*/ 35, MVT::v4f16,// ->85189
39690 MVT::v4f16, 8/*#Ops*/, 1, 2, 5, 6, 7, 8, 9, 10,
39721 /* 85248*/ /*SwitchType*/ 36, MVT::v4f16,// ->85286
39731 MVT::v4f16, 9/*#Ops*/, 2, 1, 3, 6, 7, 8, 9, 10, 11,
39765 /* 85352*/ /*SwitchType*/ 36, MVT::v4f16,// ->85390
39775 MVT::v4f16, 9/*#Ops*/, 2, 1, 3, 6, 7, 8, 9, 10, 11,
39811 /* 85471*/ /*SwitchType*/ 56, MVT::v4f16,// ->85529
39826 MVT::v4f16, 9/*#Ops*/, 10, 1, 4, 11, 12, 13, 14, 15, 16,
40437 /* 87061*/ /*SwitchType*/ 33, MVT::v4f16,// ->87096
40446 MVT::v4f16, 8/*#Ops*/, 1, 2, 5, 6, 7, 8, 9, 10,
40512 /* 87260*/ /*SwitchType*/ 34, MVT::v4f16,// ->87296
40521 MVT::v4f16, 9/*#Ops*/, 2, 1, 3, 6, 7, 8, 9, 10, 11,
40590 /* 87469*/ /*SwitchType*/ 34, MVT::v4f16,// ->87505
40599 MVT::v4f16, 9/*#Ops*/, 2, 1, 3, 6, 7, 8, 9, 10, 11,
40675 /* 87712*/ /*SwitchType*/ 54, MVT::v4f16,// ->87768
40689 MVT::v4f16, 9/*#Ops*/, 10, 1, 4, 11, 12, 13, 14, 15, 16,
42983 /* 92944*/ OPC_CheckChild1Type, MVT::v4f16,
44031 /* 95273*/ OPC_CheckChild1Type, MVT::v4f16,
62564 /*136747*/ /*SwitchType*/ 3, MVT::v4f16,// ->136752
62587 /*136777*/ /*SwitchType*/ 3, MVT::v4f16,// ->136782
62610 /*136807*/ /*SwitchType*/ 3, MVT::v4f16,// ->136812
62629 /*136832*/ /*SwitchType*/ 3, MVT::v4f16,// ->136837
62639 /*136844*/ OPC_CheckChild0Type, MVT::v4f16,
62718 /*136946*/ /*SwitchType*/ 3, MVT::v4f16,// ->136951
73930 /*163424*/ /*SwitchType*/ 39, MVT::v4f16,// ->163465
73941 MVT::v4f16, 9/*#Ops*/, 1, 2, 6, 7, 8, 9, 10, 11, 12,
73977 /*163535*/ /*SwitchType*/ 40, MVT::v4f16,// ->163577
73988 MVT::v4f16, 10/*#Ops*/, 2, 1, 3, 7, 8, 9, 10, 11, 12, 13,
74027 /*163654*/ /*SwitchType*/ 40, MVT::v4f16,// ->163696
74038 MVT::v4f16, 10/*#Ops*/, 2, 1, 3, 7, 8, 9, 10, 11, 12, 13,
74079 /*163788*/ /*SwitchType*/ 60, MVT::v4f16,// ->163850
74095 MVT::v4f16, 10/*#Ops*/, 11, 1, 4, 12, 13, 14, 15, 16, 17, 18,
78449 /*174407*/ /*SwitchType*/ 18, MVT::v4f16,// ->174427
78451 MVT::v4f16, 0/*#Ops*/, // Results = #1
78454 MVT::v4f16, 3/*#Ops*/, 1, 0, 2,
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc17461 /* 10 */ MVT::i64, MVT::f64, MVT::v2i32, MVT::v2f32, MVT::v4f16, MVT::v4i16, MVT::i64, MVT::i64, MVT::i64, MVT::Other,
17464 /* 34 */ MVT::i64, MVT::f64, MVT::v2i32, MVT::v2f32, MVT::v4f16, MVT::v4i16, MVT::Other,
17468 /* 57 */ MVT::i64, MVT::f64, MVT::v4f16, MVT::Other,
17469 /* 61 */ MVT::v2i32, MVT::i64, MVT::v2f32, MVT::f64, MVT::i1, MVT::v4i16, MVT::v4f16, MVT::Other,
17470 /* 69 */ MVT::v2i32, MVT::i64, MVT::f64, MVT::v4i16, MVT::v4f16, MVT::Other,
17471 /* 75 */ MVT::v2i32, MVT::i64, MVT::v2f32, MVT::f64, MVT::v4i16, MVT::v4f16, MVT::Other,
gen/lib/Target/ARM/ARMGenCallingConv.inc 66 LocVT == MVT::v4f16 ||
67 LocVT == MVT::v4f16 ||
238 LocVT == MVT::v4f16 ||
239 LocVT == MVT::v4f16 ||
359 LocVT == MVT::v4f16 ||
426 LocVT == MVT::v4f16 ||
520 LocVT == MVT::v4f16 ||
608 LocVT == MVT::v4f16 ||
609 LocVT == MVT::v4f16 ||
713 LocVT == MVT::v4f16 ||
714 LocVT == MVT::v4f16 ||
829 LocVT == MVT::v4f16 ||
886 LocVT == MVT::v4f16 ||
gen/lib/Target/ARM/ARMGenDAGISel.inc15077 /* 32382*/ /*SwitchType*/ 11, MVT::v4f16,// ->32395
15078 /* 32384*/ OPC_CheckChild1Type, MVT::v4f16,
15081 MVT::v4f16, 1/*#Ops*/, 0,
17634 /* 37655*/ OPC_CheckChild1Type, MVT::v4f16,
17698 /* 37787*/ OPC_CheckChild1Type, MVT::v4f16,
18497 /* 39572*/ OPC_CheckChild1Type, MVT::v4f16,
18499 /* 39575*/ OPC_CheckChild2Type, MVT::v4f16,
18545 /* 39679*/ OPC_CheckChild1Type, MVT::v4f16,
18547 /* 39682*/ OPC_CheckChild2Type, MVT::v4f16,
18792 /* 40233*/ /*SwitchType*/ 23, MVT::v4f16,// ->40258
18793 /* 40235*/ OPC_CheckChild1Type, MVT::v4f16,
18795 /* 40238*/ OPC_CheckChild2Type, MVT::v4f16,
18800 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
18932 /* 40549*/ /*SwitchType*/ 23, MVT::v4f16,// ->40574
18933 /* 40551*/ OPC_CheckChild1Type, MVT::v4f16,
18935 /* 40554*/ OPC_CheckChild2Type, MVT::v4f16,
18940 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
19247 /* 41266*/ /*SwitchType*/ 23, MVT::v4f16,// ->41291
19248 /* 41268*/ OPC_CheckChild1Type, MVT::v4f16,
19250 /* 41271*/ OPC_CheckChild2Type, MVT::v4f16,
19255 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
19343 /* 41481*/ /*SwitchType*/ 23, MVT::v4f16,// ->41506
19344 /* 41483*/ OPC_CheckChild1Type, MVT::v4f16,
19346 /* 41486*/ OPC_CheckChild2Type, MVT::v4f16,
19351 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
19431 /* 41680*/ /*SwitchType*/ 19, MVT::v4f16,// ->41701
19432 /* 41682*/ OPC_CheckChild1Type, MVT::v4f16,
19437 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
19489 /* 41814*/ /*SwitchType*/ 19, MVT::v4f16,// ->41835
19490 /* 41816*/ OPC_CheckChild1Type, MVT::v4f16,
19495 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
20529 /* 44167*/ OPC_CheckChild1Type, MVT::v4f16,
20561 /* 44226*/ OPC_CheckChild1Type, MVT::v4f16,
20593 /* 44285*/ OPC_CheckChild1Type, MVT::v4f16,
20625 /* 44344*/ OPC_CheckChild1Type, MVT::v4f16,
20657 /* 44403*/ OPC_CheckChild1Type, MVT::v4f16,
20689 /* 44462*/ OPC_CheckChild1Type, MVT::v4f16,
20721 /* 44521*/ OPC_CheckChild1Type, MVT::v4f16,
20753 /* 44580*/ OPC_CheckChild1Type, MVT::v4f16,
21286 /* 45753*/ OPC_CheckType, MVT::v4f16,
21292 MVT::v4f16, 4/*#Ops*/, 0, 2, 3, 4,
21350 /* 45885*/ OPC_CheckType, MVT::v4f16,
21356 MVT::v4f16, 4/*#Ops*/, 0, 2, 3, 4,
21415 /* 46026*/ /*SwitchType*/ 23, MVT::v4f16,// ->46051
21416 /* 46028*/ OPC_CheckChild1Type, MVT::v4f16,
21418 /* 46031*/ OPC_CheckChild2Type, MVT::v4f16,
21423 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
21463 /* 46133*/ /*SwitchType*/ 23, MVT::v4f16,// ->46158
21464 /* 46135*/ OPC_CheckChild1Type, MVT::v4f16,
21466 /* 46138*/ OPC_CheckChild2Type, MVT::v4f16,
21471 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
21513 /* 46238*/ /*SwitchType*/ 11, MVT::v4f16,// ->46251
21514 /* 46240*/ OPC_CheckChild1Type, MVT::v4f16,
21517 MVT::v4f16, 1/*#Ops*/, 0,
21545 /* 46297*/ /*SwitchType*/ 11, MVT::v4f16,// ->46310
21546 /* 46299*/ OPC_CheckChild1Type, MVT::v4f16,
21549 MVT::v4f16, 1/*#Ops*/, 0,
21577 /* 46356*/ /*SwitchType*/ 11, MVT::v4f16,// ->46369
21578 /* 46358*/ OPC_CheckChild1Type, MVT::v4f16,
21581 MVT::v4f16, 1/*#Ops*/, 0,
21609 /* 46415*/ /*SwitchType*/ 11, MVT::v4f16,// ->46428
21610 /* 46417*/ OPC_CheckChild1Type, MVT::v4f16,
21613 MVT::v4f16, 1/*#Ops*/, 0,
21641 /* 46474*/ /*SwitchType*/ 11, MVT::v4f16,// ->46487
21642 /* 46476*/ OPC_CheckChild1Type, MVT::v4f16,
21645 MVT::v4f16, 1/*#Ops*/, 0,
22317 /* 47947*/ OPC_CheckChild0Type, MVT::v4f16,
36915 /* 81223*/ OPC_CheckChild0Type, MVT::v4f16,
37226 /* 81941*/ OPC_CheckChild0Type, MVT::v4f16,
37478 /* 82542*/ OPC_CheckChild0Type, MVT::v4f16,
38795 /* 85501*/ /*SwitchType*/ 26, MVT::v4f16,// ->85529
38806 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
38878 /* 85654*/ /*SwitchType*/ 26, MVT::v4f16,// ->85682
38889 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
38961 /* 85807*/ /*SwitchType*/ 26, MVT::v4f16,// ->85835
38972 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
38978 /* 85838*/ OPC_CheckChild0Type, MVT::v4f16,
39122 /* 86106*/ /*SwitchType*/ 5, MVT::v4f16,// ->86113
39220 /* 86287*/ /*SwitchType*/ 26, MVT::v4f16,// ->86315
39231 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
39326 /* 86495*/ /*SwitchType*/ 26, MVT::v4f16,// ->86523
39337 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
41173 /* 90411*/ /*SwitchType*/ 19, MVT::v4f16,// ->90432
41179 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
41422 /* 91046*/ /*SwitchType*/ 19, MVT::v4f16,// ->91067
41428 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
42348 /* 93281*/ OPC_CheckChild0Type, MVT::v4f16,
42355 /* 93291*/ OPC_SwitchType /*2 cases */, 22, MVT::v4f16,// ->93316
42361 MVT::v4f16, 6/*#Ops*/, 0, 1, 2, 4, 5, 6,
42378 /* 93347*/ OPC_CheckChild0Type, MVT::v4f16,
42386 /* 93358*/ OPC_CheckType, MVT::v4f16,
42392 MVT::v4f16, 6/*#Ops*/, 0, 3, 1, 4, 5, 6,
42404 /* 93396*/ OPC_CheckChild0Type, MVT::v4f16,
42412 /* 93407*/ OPC_CheckType, MVT::v4f16,
42418 MVT::v4f16, 6/*#Ops*/, 3, 0, 1, 4, 5, 6,
42425 /* 93437*/ OPC_CheckChild0Type, MVT::v4f16,
42434 /* 93449*/ OPC_CheckType, MVT::v4f16,
42440 MVT::v4f16, 6/*#Ops*/, 3, 2, 0, 4, 5, 6,
42451 /* 93485*/ OPC_CheckChild0Type, MVT::v4f16,
42476 /* 93533*/ OPC_CheckChild0Type, MVT::v4f16,
42497 /* 93574*/ OPC_CheckChild0Type, MVT::v4f16,
42561 /* 93714*/ /*SwitchType*/ 19, MVT::v4f16,// ->93735
42566 MVT::v4f16, 5/*#Ops*/, 0, 1, 2, 3, 4,
42623 /* 93860*/ /*SwitchType*/ 19, MVT::v4f16,// ->93881
42628 MVT::v4f16, 5/*#Ops*/, 2, 0, 1, 3, 4,
42647 /* 93912*/ OPC_SwitchType /*3 cases */, 19, MVT::v4f16,// ->93934
42652 MVT::v4f16, 5/*#Ops*/, 0, 1, 2, 3, 4,
42689 /* 94009*/ OPC_SwitchType /*3 cases */, 19, MVT::v4f16,// ->94031
42694 MVT::v4f16, 5/*#Ops*/, 2, 0, 1, 3, 4,
42755 /* 94171*/ /*SwitchType*/ 18, MVT::v4f16,// ->94191
42760 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
43326 /* 95572*/ OPC_CheckChild0Type, MVT::v4f16,
43333 /* 95582*/ OPC_SwitchType /*2 cases */, 22, MVT::v4f16,// ->95607
43339 MVT::v4f16, 6/*#Ops*/, 0, 1, 2, 4, 5, 6,
43356 /* 95638*/ OPC_CheckChild0Type, MVT::v4f16,
43364 /* 95649*/ OPC_SwitchType /*2 cases */, 22, MVT::v4f16,// ->95674
43370 MVT::v4f16, 6/*#Ops*/, 0, 3, 1, 4, 5, 6,
43429 /* 95803*/ OPC_SwitchType /*3 cases */, 42, MVT::v4f16,// ->95848
43435 MVT::v4f16, 5/*#Ops*/, 0, 1, 2, 3, 4,
43443 MVT::v4f16, 5/*#Ops*/, 0, 1, 2, 3, 4,
43514 /* 96009*/ /*SwitchType*/ 18, MVT::v4f16,// ->96029
43519 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
43700 /* 96430*/ OPC_SwitchType /*4 cases */, 19, MVT::v4f16,// ->96452
43705 MVT::v4f16, 5/*#Ops*/, 2, 0, 1, 3, 4,
43973 /* 97105*/ /*SwitchType*/ 17, MVT::v4f16,// ->97124
43978 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
44141 /* 97514*/ OPC_CheckChild0Type, MVT::v4f16,
44147 /* 97523*/ OPC_SwitchType /*2 cases */, 21, MVT::v4f16,// ->97547
44153 MVT::v4f16, 5/*#Ops*/, 0, 1, 3, 4, 5,
44200 /* 97640*/ OPC_CheckChild0Type, MVT::v4f16,
44207 /* 97650*/ OPC_SwitchType /*2 cases */, 21, MVT::v4f16,// ->97674
44213 MVT::v4f16, 5/*#Ops*/, 2, 0, 3, 4, 5,
44265 MVT::v4f16, 2/*#Ops*/, 1, 4, // Results = #5
44314 MVT::v4f16, 2/*#Ops*/, 0, 4, // Results = #5
44364 /* 98017*/ OPC_SwitchType /*2 cases */, 40, MVT::v4f16,// ->98060
44367 MVT::v4f16, 0/*#Ops*/, // Results = #2
44370 MVT::v4f16, 3/*#Ops*/, 2, 1, 3, // Results = #4
44375 MVT::v4f16, 5/*#Ops*/, 0, 4, 5, 6, 7,
44381 MVT::v4f16, 0/*#Ops*/, // Results = #2
44384 MVT::v4f16, 3/*#Ops*/, 2, 1, 3, // Results = #4
44435 /* 98208*/ OPC_SwitchType /*2 cases */, 40, MVT::v4f16,// ->98251
44438 MVT::v4f16, 0/*#Ops*/, // Results = #2
44441 MVT::v4f16, 3/*#Ops*/, 2, 0, 3, // Results = #4
44446 MVT::v4f16, 5/*#Ops*/, 1, 4, 5, 6, 7,
44452 MVT::v4f16, 0/*#Ops*/, // Results = #2
44455 MVT::v4f16, 3/*#Ops*/, 2, 0, 3, // Results = #4
44496 /* 98369*/ /*SwitchType*/ 18, MVT::v4f16,// ->98389
44501 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
44638 /* 98738*/ /*SwitchType*/ 17, MVT::v4f16,// ->98757
44643 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
44777 /* 99053*/ /*SwitchType*/ 10, MVT::v4f16,// ->99065
44780 MVT::v4f16, 2/*#Ops*/, 0, 1,
44847 /* 99203*/ /*SwitchType*/ 10, MVT::v4f16,// ->99215
44850 MVT::v4f16, 2/*#Ops*/, 0, 1,
45290 MVT::v4f16, 0/*#Ops*/, // Results = #2
45293 MVT::v4f16, 2/*#Ops*/, 2, 3, // Results = #4
45296 MVT::v4f16, 3/*#Ops*/, 4, 0, 5, // Results = #6
45298 MVT::v4f16, 0/*#Ops*/, // Results = #7
45301 MVT::v4f16, 2/*#Ops*/, 7, 8, // Results = #9
45304 MVT::v4f16, 3/*#Ops*/, 9, 1, 10, // Results = #11
45311 MVT::v4f16, 2/*#Ops*/, 14, 15, // Results = #16
45363 /*100481*/ /*SwitchType*/ 18, MVT::v4f16,// ->100501
45368 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
45386 MVT::v4f16, 0/*#Ops*/, // Results = #2
45389 MVT::v4f16, 2/*#Ops*/, 2, 3, // Results = #4
45392 MVT::v4f16, 3/*#Ops*/, 4, 0, 5, // Results = #6
45394 MVT::v4f16, 0/*#Ops*/, // Results = #7
45397 MVT::v4f16, 2/*#Ops*/, 7, 8, // Results = #9
45400 MVT::v4f16, 3/*#Ops*/, 9, 1, 10, // Results = #11
45407 MVT::v4f16, 2/*#Ops*/, 14, 15, // Results = #16
45459 /*100769*/ /*SwitchType*/ 18, MVT::v4f16,// ->100789
45464 MVT::v4f16, 4/*#Ops*/, 0, 1, 2, 3,
46074 /*102123*/ OPC_SwitchType /*2 cases */, 26, MVT::v4f16,// ->102152
46082 MVT::v4f16, 6/*#Ops*/, 4, 5, 0, 6, 7, 8,
46189 /*102397*/ /*SwitchType*/ 36, MVT::v4f16,// ->102435
46199 MVT::v4f16, 5/*#Ops*/, 0, 5, 6, 7, 8,
46565 MVT::v4f16, 0/*#Ops*/, // Results = #1
46568 MVT::v4f16, 3/*#Ops*/, 1, 0, 2, // Results = #3
46577 /*103323*/ /*SwitchType*/ 39, MVT::v4f16,// ->103364
46580 MVT::v4f16, 0/*#Ops*/, // Results = #1
46583 MVT::v4f16, 3/*#Ops*/, 1, 0, 2, // Results = #3
46588 MVT::v4f16, 4/*#Ops*/, 3, 4, 5, 6,
49240 /*109588*/ OPC_CheckChild0Type, MVT::v4f16,
49712 /*110610*/ OPC_CheckChild0Type, MVT::v4f16,
51074 /*113732*/ OPC_CheckChild0Type, MVT::v4f16,
51079 /*113740*/ OPC_CheckType, MVT::v4f16,
51085 MVT::v4f16, 4/*#Ops*/, 0, 2, 3, 4,
51125 MVT::v4f16, 2/*#Ops*/, 0, 3, // Results = #4
51967 /*115830*/ OPC_CheckType, MVT::v4f16,
51972 MVT::v4f16, 2/*#Ops*/, 0, 3,
52046 /*116022*/ /*SwitchType*/ 21, MVT::v4f16,// ->116045
52052 MVT::v4f16, 5/*#Ops*/, 0, 1, 3, 4, 5,
53144 /*118752*/ /*SwitchType*/ 17, MVT::v4f16,// ->118771
53149 MVT::v4f16, 3/*#Ops*/, 0, 1, 2,
gen/lib/Target/ARM/ARMGenFastISel.inc 541 if (RetVT.SimpleTy != MVT::v4f16)
590 case MVT::v4f16: return fastEmit_ARMISD_VREV64_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
788 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4f16_r(Op0, Op0IsKill);
842 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4f16_r(Op0, Op0IsKill);
1068 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4f16_r(Op0, Op0IsKill);
1174 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4f16_r(Op0, Op0IsKill);
1389 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4f16_r(Op0, Op0IsKill);
1529 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1775 if (RetVT.SimpleTy != MVT::v4f16)
1821 case MVT::v4f16: return fastEmit_ISD_FABS_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2013 if (RetVT.SimpleTy != MVT::v4f16)
2059 case MVT::v4f16: return fastEmit_ISD_FNEG_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2149 case MVT::v4f16: return fastEmit_ISD_FP_TO_SINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2203 case MVT::v4f16: return fastEmit_ISD_FP_TO_UINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2464 if (RetVT.SimpleTy != MVT::v4f16)
2556 if (RetVT.SimpleTy != MVT::v4f16)
3618 if (RetVT.SimpleTy != MVT::v4f16)
3664 case MVT::v4f16: return fastEmit_ISD_FADD_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3713 if (RetVT.SimpleTy != MVT::v4f16)
3750 case MVT::v4f16: return fastEmit_ISD_FMAXIMUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3788 if (RetVT.SimpleTy != MVT::v4f16)
3834 case MVT::v4f16: return fastEmit_ISD_FMAXNUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3845 if (RetVT.SimpleTy != MVT::v4f16)
3882 case MVT::v4f16: return fastEmit_ISD_FMINIMUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3920 if (RetVT.SimpleTy != MVT::v4f16)
3966 case MVT::v4f16: return fastEmit_ISD_FMINNUM_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4004 if (RetVT.SimpleTy != MVT::v4f16)
4050 case MVT::v4f16: return fastEmit_ISD_FMUL_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4088 if (RetVT.SimpleTy != MVT::v4f16)
4134 case MVT::v4f16: return fastEmit_ISD_FSUB_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
5245 if (RetVT.SimpleTy != MVT::v4f16)
5280 case MVT::v4f16: return fastEmit_ARMISD_VDUPLANE_MVT_v4f16_ri(RetVT, Op0, Op0IsKill, imm1);
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 3753 /* 17 */ MVT::f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v2f32, MVT::v4f16, MVT::Other,
include/llvm/Support/MachineValueType.h 344 SimpleTy == MVT::v1i64 || SimpleTy == MVT::v4f16 ||
510 case v4f16:
621 case v4f16:
737 case v4f16:
967 if (NumElements == 4) return MVT::v4f16;
lib/CodeGen/ValueTypes.cpp 193 case MVT::v4f16: return "v4f16";
335 case MVT::v4f16: return VectorType::get(Type::getHalfTy(Context), 4);
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3022 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3049 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3076 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3103 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3130 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3157 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3184 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3211 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3238 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3262 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3280 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3298 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3374 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3402 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3430 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3458 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3486 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3514 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3539 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3558 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3577 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3602 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3630 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3658 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3686 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3714 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3742 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3770 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3798 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3826 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3854 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3879 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3898 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3917 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3936 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
3959 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
3988 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
4017 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
4046 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
4075 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
4104 } else if (VT == MVT::v4i16 || VT == MVT::v4f16) {
4130 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
4150 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
4170 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 ||
lib/Target/AArch64/AArch64ISelLowering.cpp 154 addDRTypeForNEON(MVT::v4f16);
363 setOperationAction(ISD::FREM, MVT::v4f16, Expand);
366 setOperationAction(ISD::FPOW, MVT::v4f16, Expand);
369 setOperationAction(ISD::FPOWI, MVT::v4f16, Expand);
372 setOperationAction(ISD::FCOS, MVT::v4f16, Expand);
375 setOperationAction(ISD::FSIN, MVT::v4f16, Expand);
378 setOperationAction(ISD::FSINCOS, MVT::v4f16, Expand);
381 setOperationAction(ISD::FEXP, MVT::v4f16, Expand);
384 setOperationAction(ISD::FEXP2, MVT::v4f16, Expand);
387 setOperationAction(ISD::FLOG, MVT::v4f16, Expand);
390 setOperationAction(ISD::FLOG2, MVT::v4f16, Expand);
393 setOperationAction(ISD::FLOG10, MVT::v4f16, Expand);
421 setOperationAction(ISD::FADD, MVT::v4f16, Promote);
422 setOperationAction(ISD::FSUB, MVT::v4f16, Promote);
423 setOperationAction(ISD::FMUL, MVT::v4f16, Promote);
424 setOperationAction(ISD::FDIV, MVT::v4f16, Promote);
425 setOperationAction(ISD::FP_EXTEND, MVT::v4f16, Promote);
426 setOperationAction(ISD::FP_ROUND, MVT::v4f16, Promote);
427 AddPromotedToType(ISD::FADD, MVT::v4f16, MVT::v4f32);
428 AddPromotedToType(ISD::FSUB, MVT::v4f16, MVT::v4f32);
429 AddPromotedToType(ISD::FMUL, MVT::v4f16, MVT::v4f32);
430 AddPromotedToType(ISD::FDIV, MVT::v4f16, MVT::v4f32);
431 AddPromotedToType(ISD::FP_EXTEND, MVT::v4f16, MVT::v4f32);
432 AddPromotedToType(ISD::FP_ROUND, MVT::v4f16, MVT::v4f32);
434 setOperationAction(ISD::FABS, MVT::v4f16, Expand);
435 setOperationAction(ISD::FNEG, MVT::v4f16, Expand);
436 setOperationAction(ISD::FROUND, MVT::v4f16, Expand);
437 setOperationAction(ISD::FMA, MVT::v4f16, Expand);
438 setOperationAction(ISD::SETCC, MVT::v4f16, Expand);
439 setOperationAction(ISD::BR_CC, MVT::v4f16, Expand);
440 setOperationAction(ISD::SELECT, MVT::v4f16, Expand);
441 setOperationAction(ISD::SELECT_CC, MVT::v4f16, Expand);
442 setOperationAction(ISD::FTRUNC, MVT::v4f16, Expand);
443 setOperationAction(ISD::FCOPYSIGN, MVT::v4f16, Expand);
444 setOperationAction(ISD::FFLOOR, MVT::v4f16, Expand);
445 setOperationAction(ISD::FCEIL, MVT::v4f16, Expand);
446 setOperationAction(ISD::FRINT, MVT::v4f16, Expand);
447 setOperationAction(ISD::FNEARBYINT, MVT::v4f16, Expand);
448 setOperationAction(ISD::FSQRT, MVT::v4f16, Expand);
746 for (MVT VT : { MVT::v4f16, MVT::v2f32,
791 for (MVT Ty : {MVT::v4f16, MVT::v8f16}) {
4854 } else if (VT == MVT::f16 || VT == MVT::v4f16 || VT == MVT::v8f16) {
4855 VecVT = (VT == MVT::v4f16 ? MVT::v4i16 : MVT::v8i16);
7842 VT != MVT::v1i64 && VT != MVT::v2f32 && VT != MVT::v4f16)
7876 VT != MVT::v1i64 && VT != MVT::v2f32 && VT != MVT::v4f16)
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 155 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand);
167 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand);
219 setTruncStoreAction(MVT::v4f32, MVT::v4f16, Expand);
231 setTruncStoreAction(MVT::v4f64, MVT::v4f16, Expand);
1231 if (VT == MVT::v4i16 || VT == MVT::v4f16) {
lib/Target/AMDGPU/SIISelLowering.cpp 153 addRegisterClass(MVT::v4f16, &AMDGPU::SReg_64RegClass);
250 MVT::v2i64, MVT::v2f64, MVT::v4i16, MVT::v4f16,
300 setOperationAction(ISD::BUILD_VECTOR, MVT::v4f16, Custom);
308 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f16, Custom);
321 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f16, Custom);
323 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f16, Custom);
509 for (MVT VT : {MVT::v2i16, MVT::v2f16, MVT::v4i16, MVT::v4f16}) {
558 setOperationAction(ISD::LOAD, MVT::v4f16, Promote);
559 AddPromotedToType(ISD::LOAD, MVT::v4f16, MVT::v2i32);
563 setOperationAction(ISD::STORE, MVT::v4f16, Promote);
564 AddPromotedToType(ISD::STORE, MVT::v4f16, MVT::v2i32);
590 setOperationAction(ISD::FMINNUM_IEEE, MVT::v4f16, Custom);
591 setOperationAction(ISD::FMAXNUM_IEEE, MVT::v4f16, Custom);
593 setOperationAction(ISD::FMINNUM, MVT::v4f16, Expand);
594 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Expand);
621 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f16, Custom);
636 setOperationAction(ISD::FADD, MVT::v4f16, Custom);
637 setOperationAction(ISD::FMUL, MVT::v4f16, Custom);
638 setOperationAction(ISD::FMA, MVT::v4f16, Custom);
643 setOperationAction(ISD::FMINNUM, MVT::v4f16, Custom);
644 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Custom);
645 setOperationAction(ISD::FCANONICALIZE, MVT::v4f16, Custom);
649 setOperationAction(ISD::SELECT, MVT::v4f16, Custom);
652 setOperationAction(ISD::FNEG, MVT::v4f16, Custom);
653 setOperationAction(ISD::FABS, MVT::v4f16, Custom);
669 for (MVT VT : { MVT::v4i16, MVT::v4f16, MVT::v2i8, MVT::v4i8, MVT::v8i8 }) {
683 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::v4f16, Custom);
694 setOperationAction(ISD::INTRINSIC_VOID, MVT::v4f16, Custom);
3952 assert(VT == MVT::v4f16);
3972 assert(VT == MVT::v4i16 || VT == MVT::v4f16);
3993 assert(VT == MVT::v4i16 || VT == MVT::v4f16);
4597 if (VT == MVT::v4f16)
4964 if (VT == MVT::v4i16 || VT == MVT::v4f16) {
5281 PreTFCRes = DAG.getNode(ISD::BITCAST, DL, MVT::v4f16, PreTFCRes);
lib/Target/ARM/ARMCallingConv.cpp 217 case MVT::v4f16:
lib/Target/ARM/ARMISelDAGToDAG.cpp 1945 case MVT::v4f16:
2087 case MVT::v4f16:
2254 case MVT::v4f16:
2540 case MVT::v4f16:
3474 case MVT::v4f16:
3497 case MVT::v4f16:
3520 case MVT::v4f16:
lib/Target/ARM/ARMISelLowering.cpp 756 addDRTypeForNEON(MVT::v4f16);
1401 setOperationAction(ISD::FMINNUM, MVT::v4f16, Legal);
1402 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Legal);
1406 setOperationAction(ISD::FMINIMUM, MVT::v4f16, Legal);
1407 setOperationAction(ISD::FMAXIMUM, MVT::v4f16, Legal);
4058 else if (RegVT == MVT::f64 || RegVT == MVT::v4f16)
5345 else if (OpTy == MVT::v4f16 && HasFullFP16)
5399 else if (VT == MVT::v4f16 && HasFullFP16)
lib/Target/NVPTX/NVPTXISelLowering.cpp 147 case MVT::v4f16:
455 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand);
456 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand);
2312 case MVT::v4f16:
3605 Info.memVT = MVT::v4f16;
3685 Info.memVT = MVT::v4f16;
4803 case MVT::v4f16:
utils/TableGen/CodeGenTarget.cpp 131 case MVT::v4f16: return "MVT::v4f16";