reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp

  714   if ((TRI->getEncodingValue(Reg) % 2) == 0)

lib/Target/AArch64/AArch64AsmPrinter.cpp

  554   unsigned RegToPrint = RC->getRegister(RI->getEncodingValue(Reg));

lib/Target/AArch64/AArch64FalkorHWPFFix.cpp

  660   unsigned Dest = LI.DestReg ? TRI->getEncodingValue(LI.DestReg) : 0;
  661   unsigned Base = TRI->getEncodingValue(LI.BaseReg);
  669     Off = (1 << 5) | TRI->getEncodingValue(LI.OffsetOpnd->getReg());

lib/Target/AArch64/AArch64InstrInfo.cpp

 2418   uint16_t DestEncoding = TRI->getEncodingValue(DestReg);
 2419   uint16_t SrcEncoding = TRI->getEncodingValue(SrcReg);
 2447   uint16_t DestEncoding = TRI->getEncodingValue(DestReg);
 2448   uint16_t SrcEncoding = TRI->getEncodingValue(SrcReg);

lib/Target/AArch64/AArch64RegisterInfo.h

   34     return getEncodingValue(i);

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 1436         RI->getEncodingValue(getReg()));
 1448         RI->getEncodingValue(getReg()));
 3391       if (getContext().getRegisterInfo()->getEncodingValue(Reg) !=
 3392           (getContext().getRegisterInfo()->getEncodingValue(PrevReg) + 1) % 32) {
 5617   unsigned FirstEncoding = RI->getEncodingValue(FirstReg);
 5638   if (RI->getEncodingValue(SecondReg) != FirstEncoding + 1 ||

lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp

  100         EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg
  129           MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn
  130         EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd

lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp

  205     return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());

lib/Target/AMDGPU/GCNRegBankReassign.cpp

  290   Reg = TRI->getEncodingValue(Reg) / 2;
  328   Reg = TRI->getEncodingValue(Reg) / 2;
  749                   TRI->getEncodingValue(AMDGPU::SGPR_NULL) / 2 + 1);

lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp

  168   return MRI.getEncodingValue(RegNo) & HW_REG_MASK;
  177       return MRI.getEncodingValue(MO.getReg());

lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp

  374     RegEnc |= MRI.getEncodingValue(Reg);
  404     RegEnc |= MRI.getEncodingValue(Reg);
  416   uint64_t Enc = MRI.getEncodingValue(Reg);
  456     return MRI.getEncodingValue(MO.getReg());

lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp

  139         unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK;
  166           if ((TRI.getEncodingValue(Src0) & 0xff) < 127 &&
  167               (TRI.getEncodingValue(Src1) & 0xff) < 127)
  243           unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK;

lib/Target/AMDGPU/R600InstrInfo.cpp

  351     int Index = RI.getEncodingValue(Reg) & 0xff;
  443       if (Src.first == GET_REG_INDEX(RI.getEncodingValue(R600::OQAP))) {
  626         unsigned Index = RI.getEncodingValue(Src.first->getReg()) & 0xff;

lib/Target/AMDGPU/R600RegisterInfo.cpp

   75   return this->getEncodingValue(reg) >> HW_CHAN_SHIFT;
   79   return GET_REG_INDEX(getEncodingValue(Reg));

lib/Target/AMDGPU/SIInsertWaitcnts.cpp

  476   unsigned Reg = TRI->getEncodingValue(Op.getReg());
  622             setRegScore(TRI->getEncodingValue(DefMO.getReg()), EXP_CNT,
 1466   RegisterEncoding.VGPR0 = TRI->getEncodingValue(AMDGPU::VGPR0);
 1469   RegisterEncoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0);

lib/Target/AMDGPU/SIRegisterInfo.h

  121     return getEncodingValue(Reg) & 0xff;

lib/Target/ARM/ARMBaseInstrInfo.cpp

 1555                return TRI.getEncodingValue(Reg1) <
 1556                       TRI.getEncodingValue(Reg2);
 2460         TRI->getEncodingValue(MO.getReg()) < FirstRegEnc)
 2461       FirstRegEnc = TRI->getEncodingValue(MO.getReg());
 2470     if (IsT1PushPop && CurRegEnc > TRI->getEncodingValue(ARM::R7))

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  343     if (Reg == PairedPhys || (getEncodingValue(Reg) & 1) != Odd)

lib/Target/ARM/ARMFrameLowering.cpp

 1020       return TRI.getEncodingValue(LHS.first) < TRI.getEncodingValue(RHS.first);
 1020       return TRI.getEncodingValue(LHS.first) < TRI.getEncodingValue(RHS.first);
 1116       return TRI.getEncodingValue(LHS) < TRI.getEncodingValue(RHS);
 1116       return TRI.getEncodingValue(LHS) < TRI.getEncodingValue(RHS);

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

 1010                                      : TRI->getEncodingValue(PReg);
 1063                                      : TRI->getEncodingValue(Reg);

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

 4304     EReg = MRI->getEncodingValue(Reg);
 4321   EReg = MRI->getEncodingValue(Reg);
 4346       if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg))
 4346       if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg))
 4352         EReg = MRI->getEncodingValue(Reg);
 4386       EReg = MRI->getEncodingValue(Reg);
 4401         MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) {
 4401         MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) {
 4412     EReg = MRI->getEncodingValue(Reg);
 4418       EReg = MRI->getEncodingValue(++Reg);
 6729   unsigned RtEncoding = MRI->getEncodingValue(Op2.getReg());
 7108         unsigned Rt = MRI->getEncodingValue(Reg1);
 7109         unsigned Rt2 = MRI->getEncodingValue(Reg2);
 7229   unsigned Rt = MRI->getEncodingValue(Inst.getOperand(RtIndex).getReg());
 7230   unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(RtIndex + 1).getReg());
 7264     unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg());
 7454     const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg());
 7455     const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg());
 7487     const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg());
 7488     const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg());
 7531     const unsigned Qd = MRI->getEncodingValue(Inst.getOperand(QdIdx).getReg());
 7532     const unsigned Qm = MRI->getEncodingValue(Inst.getOperand(QmIdx).getReg());
 7870     const unsigned Sm = MRI->getEncodingValue(Inst.getOperand(2).getReg());
 7871     const unsigned Sm1 = MRI->getEncodingValue(Inst.getOperand(3).getReg());
 7879     const unsigned Sm = MRI->getEncodingValue(Inst.getOperand(0).getReg());
 7880     const unsigned Sm1 = MRI->getEncodingValue(Inst.getOperand(1).getReg());

lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

 1342     UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg));
 1433   UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg));
 1452     unsigned Reg = MRI->getEncodingValue(RegList[i]);

lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp

  811                             return MRI.getEncodingValue(LHS.getReg()) <
  812                                    MRI.getEncodingValue(RHS.getReg());

lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

  565     unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg);
  603   Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
  938   unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
  939   unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg());
  991     Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC);   // Rn is PC.
 1070     unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg());
 1071     unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg());
 1090     unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg());
 1124     Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC);   // Rn is PC.
 1188   unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1256   unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1257   unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
 1301     Binary |= CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); // Rm is bits [3:0]
 1315   return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()) | (isAdd << 4);
 1334     Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1353     unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC);   // Rn is PC.
 1363   unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1370     Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
 1400   unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1429     Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC);   // Rn is PC.
 1469     Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC);   // Rn is PC.
 1516   unsigned Binary = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1541   return Binary | (CTX.getRegisterInfo()->getEncodingValue(Rs) << ARMII::RegRsShift);
 1561   unsigned Binary = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1601   unsigned Value = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
 1603   Value |= CTX.getRegisterInfo()->getEncodingValue(MO2.getReg());
 1619   unsigned Value = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
 1670   unsigned Binary = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
 1728     unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg);
 1743                             return MRI.getEncodingValue(LHS.getReg()) <
 1744                               MRI.getEncodingValue(RHS.getReg());
 1747       unsigned RegNo = MRI.getEncodingValue(MI.getOperand(I).getReg());
 1764   unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg.getReg());
 1788   unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg.getReg());
 1815   unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg.getReg());
 1835   return CTX.getRegisterInfo()->getEncodingValue(MO.getReg());

lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp

  253   if (MO.isReg()) return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());

lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp

   91     return MRI.getEncodingValue(MO.getReg());
  164   Encoding = MRI.getEncodingValue(Op1.getReg());

lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

 1337     if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg()))
 1337     if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg()))
 1380     unsigned int RegPairNum = RI->getEncodingValue(MO.getReg());
 1395     unsigned int RegPairNum = RI->getEncodingValue(MO.getReg());
 1411     unsigned int RegPairNum = RI->getEncodingValue(MO.getReg());
 1428     unsigned int RegPairNum = RI->getEncodingValue(MO.getReg());
 1743       unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
 1767     unsigned int RegNum = RI->getEncodingValue(Rs.getReg());
 1784     unsigned int RegNum = RI->getEncodingValue(Rs.getReg());
 1801     unsigned int RegNum = RI->getEncodingValue(Rt.getReg());
 1821     unsigned int RegNum = RI->getEncodingValue(Rt.getReg());
 1844     unsigned int RegNum = RI->getEncodingValue(Rt.getReg());
 1887       unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());

lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp

  463         getContext().getRegisterInfo()->getEncodingValue(MCO.getReg());

lib/Target/Hexagon/HexagonAsmPrinter.cpp

  376     unsigned Reg = RI->getEncodingValue(Rt.getReg());
  387     unsigned Reg = RI->getEncodingValue(Rt.getReg());
  399     unsigned Reg = RI->getEncodingValue(Rt.getReg());
  411     unsigned Reg = RI->getEncodingValue(Rs.getReg());
  596     unsigned Reg = RI->getEncodingValue(Rt.getReg());

lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp

  788     return MCT.getRegisterInfo()->getEncodingValue(Reg);

lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp

  106     return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
  125   unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg());

lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

   98   unsigned Reg0 =  Ctx.getRegisterInfo()->getEncodingValue(RegOp0);
   99   unsigned Reg1 =  Ctx.getRegisterInfo()->getEncodingValue(RegOp1);
  750     unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg);
 1057     unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg);

lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp

   81     unsigned EncVal = MCRegInfo->getEncodingValue(CurrentSubReg);

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

 1127   FrameReg = RegInfo->getEncodingValue(StackReg);
 1129   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);

lib/Target/Mips/MipsAsmPrinter.cpp

  342     unsigned RegNum = TRI->getEncodingValue(Reg);

lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp

  548     RegName = getVerboseConditionRegName(Reg, MRI.getEncodingValue(Reg));

lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp

  220   return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
  243   return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
  274     return CTX.getRegisterInfo()->getEncodingValue(Reg);

lib/Target/PowerPC/PPCAsmPrinter.cpp

 1150                               ->getEncodingValue(MI->getOperand(0).getReg());

lib/Target/PowerPC/PPCFrameLowering.cpp

  353     unsigned RegNo = TRI->getEncodingValue(LI.first);
  369       unsigned RegNo = TRI->getEncodingValue(MO.getReg());
 1955     LowerBound -= (31 - TRI->getEncodingValue(MinFPR) + 1) * 8;
 2015       std::min<unsigned>(TRI->getEncodingValue(MinGPR),
 2016                          TRI->getEncodingValue(MinG8R));

lib/Target/PowerPC/PPCInstrInfo.cpp

  941        .addImm(TRI->getEncodingValue(CRReg) * 4 + (4 - getCRBitValue(SrcReg)))

lib/Target/PowerPC/PPCRegisterInfo.cpp

  674       .addImm(getEncodingValue(SrcReg) * 4)
  716     unsigned ShiftBits = getEncodingValue(DestReg)*4;
  799       .addImm(getEncodingValue(SrcReg))
  839   unsigned ShiftBits = getEncodingValue(DestReg);

lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

  221     return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());

lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp

  128     return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());

lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp

  176     return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());

lib/Target/X86/AsmParser/X86AsmParser.cpp

 2894         MRI->getEncodingValue(Inst.getOperand(0).getReg()) >= 8 ||
 2895         MRI->getEncodingValue(Inst.getOperand(1).getReg()) < 8)
 2923         MRI->getEncodingValue(Inst.getOperand(0).getReg()) >= 8 ||
 2924         MRI->getEncodingValue(Inst.getOperand(2).getReg()) < 8)
 2959     unsigned Dest = MRI->getEncodingValue(Inst.getOperand(0).getReg());
 2960     unsigned Mask = MRI->getEncodingValue(Inst.getOperand(1).getReg());
 2962       MRI->getEncodingValue(Inst.getOperand(3 + X86::AddrIndexReg).getReg());
 2992     unsigned Dest = MRI->getEncodingValue(Inst.getOperand(0).getReg());
 2994       MRI->getEncodingValue(Inst.getOperand(4 + X86::AddrIndexReg).getReg());
 3020     unsigned Src2Enc = MRI->getEncodingValue(Src2);
 3773       if (MRI->getEncodingValue(Reg) == EncodedReg) {

lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

   83     return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()) & 0x7;
   87     return Ctx.getRegisterInfo()->getEncodingValue(

lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

   80     unsigned SEH = MRI->getEncodingValue(Reg);

lib/Target/X86/X86ISelLowering.cpp

24388     const unsigned char N86R10 = TRI->getEncodingValue(X86::R10) & 0x7;
24389     const unsigned char N86R11 = TRI->getEncodingValue(X86::R11) & 0x7;
24490     const unsigned char N86Reg = TRI->getEncodingValue(NestReg) & 0x7;
46013       TRI->getEncodingValue(Res.first) >= 8) {
46020       TRI->getEncodingValue(Res.first) & 0x10) {

lib/Target/X86/X86InstrInfo.cpp

 4026   if (TRI->getEncodingValue(DestReg) < 16) {
 4049   if (TRI->getEncodingValue(SrcReg) < 16) {
 4122     if (HasVLX || TRI->getEncodingValue(SrcReg) < 16)
 4136     if (HasVLX || TRI->getEncodingValue(SrcReg) < 16) {
 6657     if (RI.getEncodingValue(MI.getOperand(0).getReg()) >= 16)
 6659     if (RI.getEncodingValue(MI.getOperand(1).getReg()) >= 16)
 6663         RI.getEncodingValue(MI.getOperand(2).getReg()) >= 16)

lib/Target/X86/X86RegisterInfo.cpp

   83   return getEncodingValue(i);

tools/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp

 1192   dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1193   src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1245   src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1246   base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1305   src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1306   base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1356   dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1357   src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1361     rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg());
 1392     rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg());
 1433   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1474   base = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1507   src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1508   base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1573       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
 1602     src = m_reg_info->getEncodingValue(insn.getOperand(i).getReg());
 1644   uint32_t src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1645   uint32_t base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1703       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
 1723     dst = m_reg_info->getEncodingValue(insn.getOperand(i).getReg());
 1808   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1809   rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1858   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1859   rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1937   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2006   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2056   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2110   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2214   uint32_t rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2295   uint32_t rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2385   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2386   rs = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 2560   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2561   rs = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 2596   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2633   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2658   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2682   cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2726   ft = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2762   ft = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2798   cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2884   uint32_t wt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2953   uint32_t wt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2987       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
 3020       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
 3022       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 1).getReg());

tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp

 1084   dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1085   src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1149   src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1150   base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1202   src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1203   base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1251   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1269   dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1270   src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1274     rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg());
 1305     rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg());
 1348   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1349   rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1400   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1510   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1578   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1664   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1665   rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1744   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1861   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1862   rs = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
 1897   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1934   rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1959   rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 1990   cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2036   ft = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2072   ft = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2108   cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2195   uint32_t wt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2264   uint32_t wt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
 2298       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
 2331       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
 2333       m_reg_info->getEncodingValue(insn.getOperand(num_operands - 1).getReg());