reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc

16434           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
16700           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
16959           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,

gen/lib/Target/Mips/MipsGenGlobalISel.inc

15138           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
15205           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
15276           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
15343           GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,

gen/lib/Target/RISCV/RISCVGenGlobalISel.inc

11017       GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
11048       GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
11153       GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
11184       GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
11291       GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
11359       GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,

include/llvm/IR/IRBuilder.h

 2191     return CreateFCmp(FCmpInst::FCMP_ORD, LHS, RHS, Name, FPMathTag);

include/llvm/IR/Instructions.h

 1367            getPredicate() == FCMP_ORD ||

lib/Analysis/BranchProbabilityInfo.cpp

  795   } else if (FCmp->getPredicate() == FCmpInst::FCMP_ORD) {

lib/Analysis/InstructionSimplify.cpp

 1764   if ((PredL == FCmpInst::FCMP_ORD && PredR == FCmpInst::FCMP_ORD && IsAnd) ||
 1764   if ((PredL == FCmpInst::FCMP_ORD && PredR == FCmpInst::FCMP_ORD && IsAnd) ||
 3499   if (Pred == FCmpInst::FCMP_UNO || Pred == FCmpInst::FCMP_ORD)
 3502       return ConstantInt::get(RetTy, Pred == FCmpInst::FCMP_ORD);

lib/AsmParser/LLParser.cpp

 5856     case lltok::kw_ord: P = CmpInst::FCMP_ORD; break;

lib/CodeGen/Analysis.cpp

  210   case FCmpInst::FCMP_ORD:   return ISD::SETO;

lib/CodeGen/MIRParser/MIParser.cpp

 2254                .Case("ord", CmpInst::FCMP_ORD)

lib/CodeGen/SelectionDAG/FastISel.cpp

 2446   case CmpInst::FCMP_OEQ:   Predicate = CmpInst::FCMP_ORD;   break;
 2448   case CmpInst::FCMP_OGE:   Predicate = CmpInst::FCMP_ORD;   break;
 2450   case CmpInst::FCMP_OLE:   Predicate = CmpInst::FCMP_ORD;   break;
 2452   case CmpInst::FCMP_ORD:   Predicate = CmpInst::FCMP_ORD;   break;
 2452   case CmpInst::FCMP_ORD:   Predicate = CmpInst::FCMP_ORD;   break;

lib/ExecutionEngine/Interpreter/Execution.cpp

  679   case FCmpInst::FCMP_ORD:   R = executeFCMP_ORD(Src1, Src2, Ty); break;
  712   case FCmpInst::FCMP_ORD:   return executeFCMP_ORD(Src1, Src2, Ty);

lib/FuzzMutate/Operations.cpp

   59   Ops.push_back(cmpOpDescriptor(1, Instruction::FCmp, CmpInst::FCMP_ORD));

lib/IR/ConstantFold.cpp

 1887     case FCmpInst::FCMP_ORD:
 1946     case FCmpInst::FCMP_ORD:

lib/IR/Constants.cpp

 1976   case CmpInst::FCMP_ONE:   case CmpInst::FCMP_ORD: case CmpInst::FCMP_UNO:

lib/IR/Instructions.cpp

 3564     case FCMP_ORD: return FCMP_UNO;
 3565     case FCMP_UNO: return FCMP_ORD;
 3581   case FCmpInst::FCMP_ORD:   return "ord";
 3669     case FCMP_ORD: case FCMP_UNO:
 3734     case FCmpInst::FCMP_ORD: return true;

lib/Target/AArch64/AArch64FastISel.cpp

 2270   case CmpInst::FCMP_ORD:

lib/Target/AArch64/AArch64InstructionSelector.cpp

  924   case CmpInst::FCMP_ORD:

lib/Target/ARM/ARMFastISel.cpp

 1215     case CmpInst::FCMP_ORD:

lib/Target/ARM/ARMInstructionSelector.cpp

  423   case CmpInst::FCMP_ORD:

lib/Target/ARM/ARMLegalizerInfo.cpp

  267   FCmp32Libcalls[CmpInst::FCMP_ORD] = {{RTLIB::O_F32, CmpInst::ICMP_EQ}};
  293   FCmp64Libcalls[CmpInst::FCMP_ORD] = {{RTLIB::O_F64, CmpInst::ICMP_EQ}};
  318   FCmp32Libcalls[CmpInst::FCMP_ORD] = {{RTLIB::O_F32, CmpInst::ICMP_EQ}};
  336   FCmp64Libcalls[CmpInst::FCMP_ORD] = {{RTLIB::O_F64, CmpInst::ICMP_EQ}};

lib/Target/Mips/MipsInstructionSelector.cpp

  712     case CmpInst::FCMP_ORD: // Ordered (OR)

lib/Target/PowerPC/PPCFastISel.cpp

  263     case CmpInst::FCMP_ORD:

lib/Target/SystemZ/SystemZTargetTransformInfo.cpp

  828         case CmpInst::Predicate::FCMP_ORD:

lib/Target/X86/X86FastISel.cpp

  213   case CmpInst::FCMP_ORD: CC = 7;          break;
 1466   if (Predicate == CmpInst::FCMP_ORD || Predicate == CmpInst::FCMP_UNO) {
 1654       if (Predicate == CmpInst::FCMP_ORD || Predicate == CmpInst::FCMP_UNO) {
 2166   if (Predicate == CmpInst::FCMP_ORD || Predicate == CmpInst::FCMP_UNO) {

lib/Target/X86/X86InstrInfo.cpp

 2276   case CmpInst::FCMP_ORD: CC = X86::COND_NP;      break;

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

   39   static_assert(FCmpInst::FCMP_ORD   ==  7, "");  // 0 1 1 1
 1392   if ((PredL == FCmpInst::FCMP_ORD && PredR == FCmpInst::FCMP_ORD && IsAnd) ||
 1392   if ((PredL == FCmpInst::FCMP_ORD && PredR == FCmpInst::FCMP_ORD && IsAnd) ||
 1428   FCmpInst::Predicate NanPred = Opcode == Instruction::And ? FCmpInst::FCMP_ORD

lib/Transforms/InstCombine/InstCombineCompares.cpp

 5700   case FCmpInst::FCMP_ORD:
 5928     return replacePredAndOp0(&I, FCmpInst::FCMP_ORD, X);
 5939   case FCmpInst::FCMP_ORD:
 5985     case FCmpInst::FCMP_ORD:    // True if ordered (no nans)
 5990       I.setPredicate(FCmpInst::FCMP_ORD);
 5998   if (Pred == CmpInst::FCMP_ORD || Pred == CmpInst::FCMP_UNO) {

tools/clang/lib/CodeGen/CGBuiltin.cpp

12031     return getVectorFCmpIR(CmpInst::FCMP_ORD);
12064     case 0x07: Pred = FCmpInst::FCMP_ORD;   break;
12080     case 0x17: Pred = FCmpInst::FCMP_ORD;   break;