reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Overridden By

lib/Target/AArch64/AArch64InstrInfo.cpp

 2805 void AArch64InstrInfo::storeRegToStackSlot(

lib/Target/AMDGPU/SIInstrInfo.cpp

 1043 void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/ARC/ARCInstrInfo.cpp

  293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/ARM/ARMBaseInstrInfo.cpp

 1028 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,

lib/Target/ARM/Thumb1InstrInfo.cpp

   78 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,

lib/Target/ARM/Thumb2InstrInfo.cpp

  135 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,

lib/Target/AVR/AVRInstrInfo.cpp

  120 void AVRInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/BPF/BPFInstrInfo.cpp

  124 void BPFInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/Hexagon/HexagonInstrInfo.cpp

  884 void HexagonInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/Lanai/LanaiInstrInfo.cpp

   49 void LanaiInstrInfo::storeRegToStackSlot(

lib/Target/MSP430/MSP430InstrInfo.cpp

   36 void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/Mips/MipsInstrInfo.h

  112   void storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/PowerPC/PPCInstrInfo.cpp

 1224 void PPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/RISCV/RISCVInstrInfo.cpp

  110 void RISCVInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/Sparc/SparcInstrInfo.cpp

  395 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,

lib/Target/SystemZ/SystemZInstrInfo.cpp

  871 void SystemZInstrInfo::storeRegToStackSlot(

lib/Target/X86/X86InstrInfo.cpp

 3244 void X86InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

lib/Target/XCore/XCoreInstrInfo.cpp

  358 void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,

References

lib/CodeGen/InlineSpiller.cpp

  412   TII.storeRegToStackSlot(*MBB, MII, SrcReg, false, StackSlot,
  949     TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot,
 1511       TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot,

lib/CodeGen/PrologEpilogInserter.cpp

  552         TII.storeRegToStackSlot(SaveBlock, I, Reg, true, CS.getFrameIdx(), RC,

lib/CodeGen/RegAllocFast.cpp

  322   TII->storeRegToStackSlot(*MBB, Before, AssignedReg, Kill, FI, &RC, TRI);

lib/CodeGen/RegisterScavenging.cpp

  516     TII->storeRegToStackSlot(*MBB, Before, Reg, true, Scavenged[SI].FrameIndex,

lib/CodeGen/TargetInstrInfo.cpp

  613     storeRegToStackSlot(*MBB, Pos, MO.getReg(), MO.isKill(), FI, RC, TRI);

lib/Target/AMDGPU/SILowerSGPRSpills.cpp

  104       TII.storeRegToStackSlot(SaveBlock, I, Reg, true, CS.getFrameIdx(), RC,

lib/Target/Mips/MipsSEFrameLowering.cpp

  835     TII.storeRegToStackSlot(MBB, MI, Reg, IsKill,

lib/Target/RISCV/RISCVISelLowering.cpp

 1165   TII.storeRegToStackSlot(*BB, MI, SrcReg, MI.getOperand(2).isKill(), FI, SrcRC,

lib/Target/SystemZ/SystemZFrameLowering.cpp

  211       TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
  216       TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),

lib/Target/XCore/XCoreFrameLowering.cpp

  441     TII.storeRegToStackSlot(MBB, MI, Reg, true, it->getFrameIdx(), RC, TRI);