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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Overridden By
lib/Target/AArch64/AArch64InstrInfo.cpp 2936 void AArch64InstrInfo::loadRegFromStackSlot(
lib/Target/AMDGPU/SIInstrInfo.cpp 1172 void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/ARC/ARCInstrInfo.cpp 322 void ARCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/ARM/ARMBaseInstrInfo.cpp 1269 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
lib/Target/ARM/Thumb1InstrInfo.cpp 106 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
lib/Target/ARM/Thumb2InstrInfo.cpp 178 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
lib/Target/AVR/AVRInstrInfo.cpp 159 void AVRInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/BPF/BPFInstrInfo.cpp 147 void BPFInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/Hexagon/HexagonInstrInfo.cpp 949 void HexagonInstrInfo::loadRegFromStackSlot(
lib/Target/Lanai/LanaiInstrInfo.cpp 69 void LanaiInstrInfo::loadRegFromStackSlot(
lib/Target/MSP430/MSP430InstrInfo.cpp 63 void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/Mips/MipsInstrInfo.h 120 void loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/PowerPC/PPCInstrInfo.cpp 1277 PPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/RISCV/RISCVInstrInfo.cpp 137 void RISCVInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/Sparc/SparcInstrInfo.cpp 434 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
lib/Target/SystemZ/SystemZInstrInfo.cpp 886 void SystemZInstrInfo::loadRegFromStackSlot(
lib/Target/X86/X86InstrInfo.cpp 3261 void X86InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
lib/Target/XCore/XCoreInstrInfo.cpp 381 void XCoreInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
References
lib/CodeGen/InlineSpiller.cpp 909 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot,
lib/CodeGen/PrologEpilogInserter.cpp 579 TII.loadRegFromStackSlot(RestoreBlock, I, Reg, CI.getFrameIdx(), RC, TRI);
lib/CodeGen/RegAllocFast.cpp 348 TII->loadRegFromStackSlot(*MBB, Before, PhysReg, FI, &RC, TRI);
lib/CodeGen/RegisterScavenging.cpp 524 TII->loadRegFromStackSlot(*MBB, UseMI, Reg, Scavenged[SI].FrameIndex,
lib/CodeGen/TargetInstrInfo.cpp 615 loadRegFromStackSlot(*MBB, Pos, MO.getReg(), FI, RC, TRI);
lib/Target/AMDGPU/SILowerSGPRSpills.cpp 137 TII.loadRegFromStackSlot(RestoreBlock, I, Reg, CI.getFrameIdx(), RC, TRI);
lib/Target/RISCV/RISCVISelLowering.cpp 1210 TII.loadRegFromStackSlot(*BB, MI, DstReg, FI, DstRC, RI);
lib/Target/SystemZ/SystemZFrameLowering.cpp 242 TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
245 TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
lib/Target/XCore/XCoreFrameLowering.cpp 469 TII.loadRegFromStackSlot(MBB, MI, Reg, it->getFrameIdx(), RC, TRI);