|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc114605 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114610 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114616 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114622 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114678 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114687 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114694 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114702 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114710 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114718 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114823 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114838 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114845 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114852 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114860 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114867 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114874 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114882 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114889 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114936 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114941 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115069 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115076 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115083 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115090 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115387 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc78692 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
79788 return CurDAG->getConstant(-N->getSExtValue(), SDLoc(N), MVT::i32);
79806 return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i32);
79812 return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i16);
79868 return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i64);
gen/lib/Target/ARC/ARCGenDAGISel.inc 1192 return isUInt<6>(N->getSExtValue());
1196 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
1206 return isInt<12>(N->getSExtValue());
gen/lib/Target/ARM/ARMGenDAGISel.inc54002 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54009 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54014 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54019 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54026 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54040 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54047 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54054 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54061 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54074 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54108 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54156 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54171 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54245 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54252 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54259 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54266 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54454 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54461 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54466 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54707 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54712 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54717 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54747 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54845 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54850 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54855 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/AVR/AVRGenDAGISel.inc 1681 int64_t val = -N->getSExtValue();
gen/lib/Target/BPF/BPFGenDAGISel.inc 1926 return isInt<32>(N->getSExtValue());
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72276 return isShiftedUInt<6, 0>(N->getSExtValue());
72321 return isShiftedUInt<5, 0>(N->getSExtValue());
72360 return isShiftedUInt<6, 1>(N->getSExtValue());
72381 return isShiftedUInt<6, 2>(N->getSExtValue());
72405 int8_t V = N->getSExtValue();
72414 int16_t V = N->getSExtValue();
72423 int64_t V = N->getSExtValue();
72468 int64_t v = (int64_t)N->getSExtValue();
72490 return isShiftedUInt<2, 0>(N->getSExtValue());
72497 return isShiftedInt<4, 3>(N->getSExtValue());
72534 return isShiftedInt<4, 0>(N->getSExtValue());
72541 return isShiftedInt<4, 1>(N->getSExtValue());
72548 return isShiftedInt<4, 2>(N->getSExtValue());
72555 int32_t V = N->getSExtValue();
72640 return isShiftedInt<32, 0>(N->getSExtValue());
72660 return isShiftedUInt<3, 0>(N->getSExtValue());
72667 return isShiftedUInt<32, 0>(N->getSExtValue());
72674 return isShiftedUInt<8, 0>(N->getSExtValue());
72731 return isShiftedUInt<4, 0>(N->getSExtValue());
72738 return isShiftedInt<8, 0>(N->getSExtValue());
72744 return isShiftedUInt<7, 0>(N->getSExtValue());
72751 return isShiftedUInt<16, 0>(N->getSExtValue());
72758 return isShiftedInt<6, 0>(N->getSExtValue());
72764 return isShiftedUInt<10, 0>(N->getSExtValue());
72771 int64_t v = (int64_t)(64 - N->getSExtValue());
72780 int64_t v = (int64_t)(128 - N->getSExtValue());
72788 return isShiftedUInt<1, 0>(N->getSExtValue());
72792 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
72867 return isShiftedUInt<11, 3>(N->getSExtValue());
72874 int64_t V = N->getSExtValue();
72882 return isShiftedInt<32, 2>(N->getSExtValue());
72888 return isInt<8>(N->getSExtValue());
72959 int8_t NV = -N->getSExtValue();
72966 int16_t NV = -N->getSExtValue();
72973 int32_t NV = -N->getSExtValue();
73022 int32_t Imm = N->getSExtValue();
73031 int8_t imm = N->getSExtValue();
73040 int16_t imm = N->getSExtValue();
73051 int32_t imm = N->getSExtValue();
73088 int32_t V = N->getSExtValue();
73095 int32_t V = N->getSExtValue();
73102 int32_t V = N->getSExtValue();
73109 int64_t V = N->getSExtValue();
73116 int32_t Imm = N->getSExtValue();
73123 int32_t Imm = N->getSExtValue();
73138 return CurDAG->getTargetConstant((64 - N->getSExtValue()) / 8,
73144 int32_t V = 64 - N->getSExtValue();return CurDAG->getTargetConstant(V, SDLoc(N), MVT::i32);
73154 int32_t V = 32 - N->getSExtValue();return CurDAG->getTargetConstant(V, SDLoc(N), MVT::i32);
73159 return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i32);
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 1481 int Imm = N->getSExtValue();
1489 int Imm = N->getSExtValue();
1565 return CurDAG->getTargetConstant(-N->getSExtValue(), SDLoc(N), MVT::i32);
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 4821 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
4827 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/Mips/MipsGenDAGISel.inc30118 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30164 return isInt<16>(N->getSExtValue());
30171 return isInt<17>(N->getSExtValue()) && isInt<16>(N->getSExtValue() + 1);
30171 return isInt<17>(N->getSExtValue()) && isInt<16>(N->getSExtValue() + 1);
30189 return N->getSExtValue() == 0;
30217 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30222 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30235 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30242 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30249 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30255 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30260 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30266 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30272 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30289 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30294 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30299 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30354 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30363 return isInt<10>(N->getSExtValue());
30367 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30374 return isInt<8>(N->getSExtValue());
30378 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30385 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30390 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30403 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30411 int64_t Val = N->getSExtValue();
30420 return isUInt<16>(N->getZExtValue()) && !isInt<16>(N->getSExtValue());
30425 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30433 int64_t SVal = N->getSExtValue();
30634 return getImm(N, N->getSExtValue() + 1);
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44263 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44272 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44281 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44290 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44470 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44477 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/RISCV/RISCVGenDAGISel.inc13813 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13962 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13967 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13976 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13985 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13990 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/Sparc/SparcGenDAGISel.inc 3493 return isInt<13>(N->getSExtValue());
3566 return isInt<11>(N->getSExtValue());
3587 int64_t Imm = N->getSExtValue();
3642 return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i32);
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc30000 return isInt<8>(N->getSExtValue());
30050 return isInt<16>(N->getSExtValue());
30077 return isInt<16>(-N->getSExtValue());
30086 return isInt<32>(-N->getSExtValue());
30292 return isInt<32>(N->getSExtValue());
30343 return isUInt<32>(-N->getSExtValue());
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc21213 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21218 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21353 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21358 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21363 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21368 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21373 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/X86/X86GenDAGISel.inc253693 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253936 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253954 return N->getSExtValue() == 3 || !Subtarget->hasPREFETCHWT1();
253959 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253966 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253986 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254005 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254012 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254019 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254145 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 3117 (uint64_t)N1C->getSExtValue());
6526 if (!ShiftOffset || (ShiftOffset->getSExtValue() % 8))
6529 Offset = ShiftOffset->getSExtValue()/8;
13476 AM.BaseOffs = Offset->getSExtValue();
13485 AM.BaseOffs = -Offset->getSExtValue();
14726 uint64_t NotMask = ~cast<ConstantSDNode>(V->getOperand(1))->getSExtValue();
18797 if (!InsIndexC || InsIndexC->getSExtValue() != Mask[ShufOp0Index])
20491 ? C->getSExtValue()
20493 ? -1 * C->getSExtValue()
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 372 MIB.addImm(C->getSExtValue());
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 4759 int64_t Offset = C2->getSExtValue();
5637 !DAG.getTargetLoweringInfo().isLegalStoreImmediate(C->getSExtValue());
6675 Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
6687 return InferPointerInfo(Info, DAG, Ptr, OffsetNode->getSExtValue());
lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 180 Offset += C->getSExtValue();
185 Offset -= C->getSExtValue();
197 Offset += C->getSExtValue();
204 Offset += C->getSExtValue();
215 auto Off = C->getSExtValue();
258 Offset += cast<ConstantSDNode>(Index->getOperand(1))->getSExtValue();
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 5344 unsigned Val = RHSC->getSExtValue();
5378 if (RHSC->getSExtValue() < 0)
8675 Builder.DAG.getTargetConstant(C->getSExtValue(), DL, MVT::i64));
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 2559 return C && C->getSExtValue() == Val;
3633 int32_t Off = C->getSExtValue();
lib/CodeGen/SelectionDAG/StatepointLowering.cpp 430 pushStackMapConstant(Ops, Builder, C->getSExtValue());
lib/CodeGen/SelectionDAG/TargetLowering.cpp 3838 LegalRHSImm = isLegalICmpImmediate(RHSC->getSExtValue());
3950 Offset += V->getSExtValue();
3955 Offset += V->getSExtValue();
4083 : C->getSExtValue();
4104 Offset += (OpCode == ISD::ADD ? 1 : -1) * C->getSExtValue();
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 518 LaneIdx = DLidx->getSExtValue() + EVidx->getSExtValue();
518 LaneIdx = DLidx->getSExtValue() + EVidx->getSExtValue();
735 int64_t RHSC = RHS->getSExtValue();
852 int64_t RHSC = RHS->getSExtValue();
lib/Target/AArch64/AArch64ISelLowering.cpp 2660 if (!isIntN(HalfSize, C->getSExtValue()))
4775 if (RHSC && RHSC->getSExtValue() == -1 && CC == ISD::SETGT &&
5076 const int64_t TrueVal = CTVal->getSExtValue();
5077 const int64_t FalseVal = CFVal->getSExtValue();
6132 uint64_t NVal = -C->getSExtValue();
6134 CVal = C->getSExtValue();
6421 int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
10390 ShiftAmount = CVN->getSExtValue();
10646 BaseOffset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue();
11176 return std::abs(cast<ConstantSDNode>(V.getNode())->getSExtValue()) <
11325 unsigned CC = cast<ConstantSDNode>(N->getOperand(CCIndex))->getSExtValue();
11378 cast<ConstantSDNode>(AddInputValue2.getNode())->getSExtValue(),
11379 cast<ConstantSDNode>(SubsInputValue.getNode())->getSExtValue()))
11868 int64_t RHSC = RHS->getSExtValue();
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 1174 if (isDSOffsetLegal(N0, C1->getSExtValue(), 16)) {
1183 int64_t ByteOffset = C->getSExtValue();
1431 if (C->getSExtValue()) {
1586 if (!cast<ConstantSDNode>(Offen)->getSExtValue() &&
1587 !cast<ConstantSDNode>(Idxen)->getSExtValue() &&
1588 !cast<ConstantSDNode>(Addr64)->getSExtValue()) {
1645 uint64_t COffsetVal = cast<ConstantSDNode>(N1)->getSExtValue();
1754 int64_t ByteOffset = C->getSExtValue();
1883 if (C1->getSExtValue() <= 0 || CurDAG->SignBitIsZero(N0)) {
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 4029 CVal->getSExtValue(),
lib/Target/AMDGPU/SIISelLowering.cpp 4185 int CondCode = CD->getSExtValue();
4222 int CondCode = CD->getSExtValue();
6108 return cast<ConstantSDNode>(VOffset)->getSExtValue() +
6109 cast<ConstantSDNode>(SOffset)->getSExtValue() +
6110 cast<ConstantSDNode>(Offset)->getSExtValue();
7179 int Offset = cast<ConstantSDNode>(N1)->getSExtValue();
lib/Target/ARC/ARCISelDAGToDAG.cpp 106 int32_t RHSC = RHS->getSExtValue();
135 int32_t RHSC = RHS->getSExtValue();
158 (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) {
158 (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) {
162 CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr), MVT::i32);
lib/Target/ARM/ARMBaseInstrInfo.cpp 1900 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue();
1901 Offset2 = cast<ConstantSDNode>(Load2->getOperand(1))->getSExtValue();
lib/Target/ARM/ARMISelDAGToDAG.cpp 629 int RHSC = (int)RHS->getSExtValue();
1057 return C->getSExtValue() < 0 && C->getSExtValue() >= -255;
1057 return C->getSExtValue() < 0 && C->getSExtValue() >= -255;
1279 int RHSC = (int)RHS->getSExtValue();
3405 if (C && C->getSExtValue() < 0 && Subtarget->isThumb()) {
3406 int64_t Addend = -C->getSExtValue();
lib/Target/ARM/ARMISelLowering.cpp 4801 int64_t Val1 = cast<ConstantSDNode>(*K1)->getSExtValue();
4802 int64_t Val2 = cast<ConstantSDNode>(*K2)->getSExtValue();
7493 int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
8232 if (Hi0->getSExtValue() == Lo0->getSExtValue() >> 32 &&
8232 if (Hi0->getSExtValue() == Lo0->getSExtValue() >> 32 &&
8233 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32)
8233 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32)
8251 if (!isIntN(HalfSize, C->getSExtValue()))
11483 int32_t imm = C->getSExtValue();
11504 int64_t imm = C->getSExtValue();
11843 int64_t MulAmt = C->getSExtValue();
15770 int64_t CVal64 = C->getSExtValue();
lib/Target/AVR/AVRISelDAGToDAG.cpp 136 int Offs = cast<ConstantSDNode>(LD->getOffset())->getSExtValue();
178 int Offs = cast<ConstantSDNode>(LD->getOffset())->getSExtValue();
lib/Target/AVR/AVRISelLowering.cpp 461 switch (C->getSExtValue()) {
480 RHS = DAG.getConstant(C->getSExtValue() + 1, DL, VT);
494 switch (C->getSExtValue()) {
524 RHS = DAG.getConstant(C->getSExtValue() + 1, DL, VT);
807 int RHSC = RHS->getSExtValue();
858 int RHSC = RHS->getSExtValue();
1934 int64_t CVal64 = C->getSExtValue();
lib/Target/BPF/BPFISelDAGToDAG.cpp 115 if (isInt<16>(CN->getSExtValue())) {
124 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64);
144 if (isInt<16>(CN->getSExtValue())) {
152 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64);
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 70 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue();
206 SDValue I = CurDAG->getTargetConstant(Inc->getSExtValue(), dl, MVT::i32);
391 SDValue I = CurDAG->getTargetConstant(Inc->getSExtValue(), DL, MVT::i32);
426 SDValue I = CurDAG->getTargetConstant(Inc->getSExtValue(), DL, MVT::i32);
469 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue();
579 int32_t ShlConst = cast<ConstantSDNode>(Shl_1)->getSExtValue();
586 int32_t ValConst = C->getSExtValue() << ShlConst;
602 if (C1->getSExtValue() != 0 || Sub_1.getOpcode() != ISD::SHL)
607 int32_t ValConst = 1 << (ShlConst + C2->getSExtValue());
722 unsigned Opc = (cast<ConstantSDNode>(N)->getSExtValue() != 0)
812 int Mask = -cast<ConstantSDNode>(A.getNode())->getSExtValue();
1390 uint64_t NewOff = GA->getOffset() + (uint64_t)Const->getSExtValue();
1583 int64_t V = CN->getSExtValue();
1693 cast<ConstantSDNode>(L.Value)->getSExtValue() == 1)
1696 cast<ConstantSDNode>(L.Value)->getSExtValue() == 0)
2083 << Offset->getSExtValue() << "): ");
2089 GANode->getOffset() + (uint64_t)Offset->getSExtValue());
lib/Target/Hexagon/HexagonISelLowering.cpp 570 int32_t V = cast<ConstantSDNode>(Offset.getNode())->getSExtValue();
671 unsigned A = AlignConst->getSExtValue();
1902 return { Addr.getOperand(0), CN->getSExtValue() };
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 429 int I = C->getSExtValue();
lib/Target/Lanai/LanaiISelDAGToDAG.cpp 96 return isInt<21>(CN.getSExtValue()) && ((CN.getSExtValue() & 0x3) == 0);
96 return isInt<21>(CN.getSExtValue()) && ((CN.getSExtValue() & 0x3) == 0);
108 int32_t Imm = CN->getSExtValue();
129 if (isInt<16>(CN->getSExtValue())) {
130 int16_t Imm = CN->getSExtValue();
142 if (isInt<10>(CN->getSExtValue())) {
143 int16_t Imm = CN->getSExtValue();
173 if ((RiMode && isInt<16>(CN->getSExtValue())) ||
174 (!RiMode && isInt<10>(CN->getSExtValue()))) {
185 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i32);
228 if (isInt<16>(CN->getSExtValue()))
lib/Target/Lanai/LanaiISelLowering.cpp 298 if (isInt<16>(C->getSExtValue())) {
299 Result = DAG.getTargetConstant(C->getSExtValue(), SDLoc(C),
317 Result = DAG.getTargetConstant(C->getSExtValue(), SDLoc(C),
334 int64_t Val = C->getSExtValue();
343 int64_t Val = C->getSExtValue();
892 int64_t MulAmt = C->getSExtValue();
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 189 uint64_t Val = cast<ConstantSDNode>(N)->getSExtValue();
226 uint64_t Offset = CN->getSExtValue();
lib/Target/MSP430/MSP430ISelLowering.cpp 1058 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0));
1072 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0));
1086 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0));
1100 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0));
lib/Target/Mips/Mips16ISelDAGToDAG.cpp 125 if (isInt<16>(CN->getSExtValue())) {
lib/Target/Mips/MipsISelLowering.cpp 669 bool invert = invertFPCondCodeUser((Mips::CondCode)CC->getSExtValue());
732 int64_t Diff = TrueC->getSExtValue() - FalseC->getSExtValue();
732 int64_t Diff = TrueC->getSExtValue() - FalseC->getSExtValue();
883 !isShiftedMask(~CN->getSExtValue(), SMPos0, SMSize0))
921 if (~CN->getSExtValue() == ((((int64_t)1 << SMSize0) - 1) << SMPos0) &&
935 if (CN->getSExtValue() & CN1->getSExtValue())
935 if (CN->getSExtValue() & CN1->getSExtValue())
949 ? DAG.getConstant(CN1->getSExtValue() >> SMPos0, DL, ValTy)
4037 int64_t Val = C->getSExtValue();
4067 int64_t Val = C->getSExtValue();
4077 int64_t Val = C->getSExtValue();
4087 int64_t Val = C->getSExtValue();
4097 int64_t Val = C->getSExtValue();
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 284 if (isIntN(OffsetBits + ShiftAmount, CN->getSExtValue())) {
793 int64_t Imm = CN->getSExtValue();
lib/Target/Mips/MipsSEISelLowering.cpp 1423 IsSigned ? CImm->getSExtValue() : CImm->getZExtValue(), IsSigned),
1977 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2140 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2148 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2167 int64_t Value = cast<ConstantSDNode>(Op->getOperand(3))->getSExtValue();
2227 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2257 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 2768 if (InputConst && InputConst->getSExtValue() >= 0)
2987 IsRHSOne = RHSConst && RHSConst->getSExtValue() == 1;
3166 IsRHSOne = RHSConst && RHSConst->getSExtValue() == 1;
3321 IsRHSOne = RHSConst && RHSConst->getSExtValue() == 1;
3481 IsRHSOne = RHSConst && RHSConst->getSExtValue() == 1;
3606 int64_t RHSValue = RHSConst ? RHSConst->getSExtValue() : INT64_MAX;
4229 int64_t TrueResVal = TrueConst->getSExtValue();
4267 int64_t SelCCTVal = SelCCTrueConst->getSExtValue();
4268 int64_t SelCCFVal = SelCCFalseConst->getSExtValue();
6521 Offset += C->getSExtValue();
lib/Target/PowerPC/PPCISelLowering.cpp 2154 int Val =cast<ConstantSDNode>(UniquedVals[Multiple-1])->getSExtValue();
11713 Offset += cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
14415 int64_t Value = CST->getSExtValue();
15199 int64_t NegConstant = 0 - Constant->getSExtValue();
15224 int64_t NegConstant = 0 - Constant->getSExtValue();
lib/Target/RISCV/RISCVISelDAGToDAG.cpp 122 int64_t Imm = ConstNode->getSExtValue();
259 Const->getSExtValue(), SDLoc(ImmOperand), ImmOperand.getValueType());
lib/Target/RISCV/RISCVISelLowering.cpp 2692 uint64_t CVal = C->getSExtValue();
lib/Target/Sparc/SparcISelDAGToDAG.cpp 90 if (isInt<13>(CN->getSExtValue())) {
129 if (isInt<13>(CN->getSExtValue()))
lib/Target/Sparc/SparcISelLowering.cpp 3238 if (isInt<13>(C->getSExtValue())) {
3239 Result = DAG.getTargetConstant(C->getSExtValue(), SDLoc(Op),
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp 473 cast<ConstantSDNode>(Op0)->getSExtValue());
476 cast<ConstantSDNode>(Op1)->getSExtValue());
575 cast<ConstantSDNode>(Addr)->getSExtValue()))
1548 isInt<16>(cast<ConstantSDNode>(Op1)->getSExtValue()) &&
1550 isInt<16>(cast<ConstantSDNode>(Op0)->getSExtValue())))) {
1830 if (TrueOp->getSExtValue() != 1 && TrueOp->getSExtValue() != -1)
1830 if (TrueOp->getSExtValue() != 1 && TrueOp->getSExtValue() != -1)
1855 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA;
1862 if (TrueOp->getSExtValue() == 1) {
lib/Target/SystemZ/SystemZISelLowering.cpp 1174 if (isInt<16>(C->getSExtValue()))
1175 Ops.push_back(DAG.getTargetConstant(C->getSExtValue(), SDLoc(Op),
1181 if (isInt<20>(C->getSExtValue()))
1182 Ops.push_back(DAG.getTargetConstant(C->getSExtValue(), SDLoc(Op),
1966 int64_t Value = ConstOp1->getSExtValue();
2000 int64_t SignedValue = ConstOp1->getSExtValue();
2110 isInt<16>(ConstOp1->getSExtValue()))
3690 Src2 = DAG.getConstant(-Const->getSExtValue(), DL, Src2.getValueType());
lib/Target/X86/X86ISelDAGToDAG.cpp 481 return isInt<Width>(CN->getSExtValue());
677 if (C && C->getSExtValue() == -2)
683 if (C && C->getSExtValue() == -2)
1382 if (C->getSExtValue() == 0 && AM.Segment.getNode() == nullptr &&
1617 int64_t Mask = cast<ConstantSDNode>(N->getOperand(1))->getSExtValue();
1867 if (!foldOffsetIntoAddress(Cst->getSExtValue(), AM))
1884 uint64_t Val = cast<ConstantSDNode>(N)->getSExtValue();
1931 uint64_t Disp = (uint64_t)AddVal->getSExtValue() << Val;
1997 uint64_t Disp = AddVal->getSExtValue() * CN->getZExtValue();
2204 uint64_t Val = cast<ConstantSDNode>(N)->getSExtValue();
3123 int64_t OperandV = OperandC->getSExtValue();
3736 int64_t Val = Cst->getSExtValue();
4537 int64_t Val = Cst->getSExtValue();
lib/Target/X86/X86ISelLowering.cpp21420 IllegalFPCMov = !hasFPCMov(cast<ConstantSDNode>(CC)->getSExtValue());
38142 int64_t SignMulAmt = C->getSExtValue();
39739 if (ShAmt0C && (ShAmt0C->getSExtValue() + ShAmt1C->getSExtValue()) == Bits)
39739 if (ShAmt0C && (ShAmt0C->getSExtValue() + ShAmt1C->getSExtValue()) == Bits)
39748 if (MaskC->getSExtValue() == (Bits - 1) &&
42248 int64_t AddConstant = Sext ? AddOp1->getSExtValue() : AddOp1->getZExtValue();
45645 if (isInt<8>(C->getSExtValue())) {
45656 Result = DAG.getTargetConstant(C->getSExtValue(), SDLoc(Op),
45693 C->getSExtValue())) {
45695 Result = DAG.getTargetConstant(C->getSExtValue(), SDLoc(Op), MVT::i64);
45725 : CST->getSExtValue();
lib/Target/X86/X86InstrInfo.cpp 5939 Offset1 = Disp1->getSExtValue();
5940 Offset2 = Disp2->getSExtValue();
lib/Target/XCore/XCoreISelDAGToDAG.cpp 98 && (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) {
98 && (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) {
101 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr),
lib/Target/XCore/XCoreISelLowering.cpp 431 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue();