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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc114629 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
114727 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
114817 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
114832 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc78732 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
79042 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/AMDGPU/R600GenDAGISel.inc12332 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
12473 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/ARC/ARCGenDAGISel.inc 1096 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1142 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/ARM/ARMGenDAGISel.inc54275 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
54315 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
54334 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
54378 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/AVR/AVRGenDAGISel.inc 1589 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1613 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1648 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1657 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/BPF/BPFGenDAGISel.inc 1932 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1987 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72290 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
72327 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
72505 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 1347 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1418 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 4791 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
4807 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Mips/MipsGenDAGISel.inc29985 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
30072 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44098 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
44195 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
44333 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/RISCV/RISCVGenDAGISel.inc13828 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
13919 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Sparc/SparcGenDAGISel.inc 3428 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
3499 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc29821 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
29868 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc21261 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
21331 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/X86/X86GenDAGISel.inc253573 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
253606 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/XCore/XCoreGenDAGISel.inc 2309 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
2369 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
include/llvm/CodeGen/SelectionDAGNodes.h 2206 assert(getAddressingMode() == AM && "Value truncated");
2220 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2223 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2594 Ld->getAddressingMode() == ISD::UNINDEXED;
2624 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
2632 St->getAddressingMode() == ISD::UNINDEXED;
2648 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 5206 NewLoad = DAG.getLoad(Load->getAddressingMode(), ISD::ZEXTLOAD,
13855 ISD::MemIndexedMode AM = LD->getAddressingMode();
13967 bool IsSub = (LD->getAddressingMode() == ISD::PRE_DEC ||
13968 LD->getAddressingMode() == ISD::POST_DEC);
20490 Offset = (LSN->getAddressingMode() == ISD::PRE_INC)
20492 : (LSN->getAddressingMode() == ISD::PRE_DEC)
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 728 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
740 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
2279 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 178 if (N->getAddressingMode() == ISD::PRE_INC) {
183 } else if (N->getAddressingMode() == ISD::PRE_DEC) {
216 if (LSBase->getAddressingMode() == ISD::PRE_DEC ||
217 LSBase->getAddressingMode() == ISD::POST_DEC)
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 656 const char *AM = getIndexedModeName(LD->getAddressingMode());
668 const char *AM = getIndexedModeName(ST->getAddressingMode());
lib/CodeGen/SelectionDAG/TargetLowering.cpp 6462 assert(LD->getAddressingMode() == ISD::UNINDEXED &&
6617 assert(ST->getAddressingMode() == ISD::UNINDEXED &&
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 1155 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/ARM/ARMISelDAGToDAG.cpp 765 ? cast<LoadSDNode>(Op)->getAddressingMode()
766 : cast<StoreSDNode>(Op)->getAddressingMode();
801 ? cast<LoadSDNode>(Op)->getAddressingMode()
802 : cast<StoreSDNode>(Op)->getAddressingMode();
821 ? cast<LoadSDNode>(Op)->getAddressingMode()
822 : cast<StoreSDNode>(Op)->getAddressingMode();
900 ? cast<LoadSDNode>(Op)->getAddressingMode()
901 : cast<StoreSDNode>(Op)->getAddressingMode();
1019 ISD::MemIndexedMode AM = LdSt->getAddressingMode();
1302 ? cast<LoadSDNode>(Op)->getAddressingMode()
1303 : cast<StoreSDNode>(Op)->getAddressingMode();
1354 ? cast<LoadSDNode>(Op)->getAddressingMode()
1355 : cast<StoreSDNode>(Op)->getAddressingMode();
1471 ISD::MemIndexedMode AM = LD->getAddressingMode();
1551 ISD::MemIndexedMode AM = LD->getAddressingMode();
1577 ISD::MemIndexedMode AM = LD->getAddressingMode();
1628 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/AVR/AVRISelDAGToDAG.cpp 123 ISD::MemIndexedMode AM = LD->getAddressingMode();
170 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 450 ISD::MemIndexedMode AM = LD->getAddressingMode();
559 ISD::MemIndexedMode AM = ST->getAddressingMode();
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 302 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 4466 ST->getAddressingMode() != ISD::PRE_INC)
4477 if (LD->getAddressingMode() != ISD::PRE_INC) {
lib/Target/PowerPC/PPCISelLowering.cpp 7529 assert(LD->getAddressingMode() == ISD::PRE_INC &&
9747 assert(LN->getAddressingMode() == ISD::PRE_INC &&
9750 LN->getAddressingMode());
9839 assert(SN->getAddressingMode() == ISD::PRE_INC &&
9842 SN->getAddressingMode());
13583 assert(LD->getAddressingMode() == ISD::PRE_INC &&
lib/Target/X86/X86ISelDAGToDAG.cpp 762 LD->getAddressingMode() != ISD::UNINDEXED ||