reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenDAGISel.inc

37996 /* 83666*/  /*SwitchOpcode*/ 74, TARGET_VAL(ISD::UMUL_LOHI),// ->83743

gen/lib/Target/Sparc/SparcGenDAGISel.inc

 2379 /*  4369*/  /*SwitchOpcode*/ 37, TARGET_VAL(ISD::UMUL_LOHI),// ->4409

include/llvm/CodeGen/TargetLowering.h

 2270     case ISD::UMUL_LOHI:

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1521   case ISD::UMUL_LOHI:          return visitUMUL_LOHI(N);

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3233         Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : ISD::SMUL_LOHI;
 3242   case ISD::UMUL_LOHI:
 3248         Node->getOpcode() == ISD::UMUL_LOHI ? ISD::MULHU : ISD::MULHS;
 3284     bool HasUMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::UMUL_LOHI, VT);
 3291       OpToUse = ISD::UMUL_LOHI;
 3295       OpToUse = ISD::UMUL_LOHI;
 4260   case ISD::UMUL_LOHI:
 4263     unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

 2925   unsigned LoHiOp = Signed ? ISD::SMUL_LOHI : ISD::UMUL_LOHI;

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  440   case ISD::UMUL_LOHI:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 3347   if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 &&
 3351   if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) {

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  233   case ISD::UMUL_LOHI:                  return "umul_lohi";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 4832     if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT)
 4833                             : isOperationLegalOrCustom(ISD::UMUL_LOHI, VT)) {
 4835           DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), X, Y);
 5592   assert(Opcode == ISD::MUL || Opcode == ISD::UMUL_LOHI ||
 5602                       isOperationLegalOrCustom(ISD::UMUL_LOHI, HiLoVT);
 5620       Lo = DAG.getNode(Signed ? ISD::SMUL_LOHI : ISD::UMUL_LOHI, dl, VTs, L, R);
 7021   unsigned LoHiOp = Signed ? ISD::SMUL_LOHI : ISD::UMUL_LOHI;
 7206       { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND },

lib/Target/AArch64/AArch64ISelLowering.cpp

  316   setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
  767       setOperationAction(ISD::UMUL_LOHI, VT, Expand);

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  319     setOperationAction(ISD::UMUL_LOHI, VT, Expand);
  383     setOperationAction(ISD::UMUL_LOHI, VT, Expand);

lib/Target/ARM/ARMISelLowering.cpp

  720     setOperationAction(ISD::UMUL_LOHI, VT, Expand);
 1039     setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
 4403     Value = DAG.getNode(ISD::UMUL_LOHI, dl,
11138   if (V->getOpcode() == ISD::UMUL_LOHI ||
11274       AddcSubcOp0->getOpcode() != ISD::UMUL_LOHI &&
11276       AddcSubcOp1->getOpcode() != ISD::UMUL_LOHI &&

lib/Target/AVR/AVRISelDAGToDAG.cpp

  540   case ISD::UMUL_LOHI:

lib/Target/AVR/AVRISelLowering.cpp

  165   setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand);
  171     setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand);

lib/Target/BPF/BPFISelLowering.cpp

   92     setOperationAction(ISD::UMUL_LOHI, VT, Expand);

lib/Target/Hexagon/HexagonISelLowering.cpp

 1377         ISD::SMUL_LOHI, ISD::UMUL_LOHI}) {
 1422     ISD::UADDO,   ISD::SSUBO,   ISD::USUBO,   ISD::SMUL_LOHI, ISD::UMUL_LOHI,

lib/Target/Lanai/LanaiISelLowering.cpp

  116   setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);

lib/Target/MSP430/MSP430ISelLowering.cpp

  121   setOperationAction(ISD::UMUL_LOHI,        MVT::i8,    Promote);
  126   setOperationAction(ISD::UMUL_LOHI,        MVT::i16,   Expand);

lib/Target/Mips/Mips16ISelDAGToDAG.cpp

  196   case ISD::UMUL_LOHI: {
  197     MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);

lib/Target/Mips/MipsSEISelLowering.cpp

  183   setOperationAction(ISD::UMUL_LOHI,          MVT::i32, Custom);
  194     setOperationAction(ISD::UMUL_LOHI,        MVT::i64, Custom);
  230     setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
  277     setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
  454   case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);

lib/Target/NVPTX/NVPTXISelLowering.cpp

  514   setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);

lib/Target/PowerPC/PPCISelLowering.cpp

  262   setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
  264   setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
  651       setOperationAction(ISD::UMUL_LOHI, VT, Expand);

lib/Target/RISCV/RISCVISelLowering.cpp

  130   setOperationAction(ISD::UMUL_LOHI, XLenVT, Expand);

lib/Target/Sparc/SparcISelLowering.cpp

 1655     setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
 1669     setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);

lib/Target/SystemZ/SystemZISelLowering.cpp

  201       setOperationAction(ISD::UMUL_LOHI, VT, Custom);
 4960   case ISD::UMUL_LOHI:

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  112        {ISD::BSWAP, ISD::SMUL_LOHI, ISD::UMUL_LOHI, ISD::MULHS, ISD::MULHU,

lib/Target/X86/X86ISelDAGToDAG.cpp

 1971   case ISD::UMUL_LOHI:
 4704   case ISD::UMUL_LOHI: {

lib/Target/X86/X86ISelLowering.cpp

  763     setOperationAction(ISD::UMUL_LOHI, VT, Expand);

lib/Target/XCore/XCoreISelLowering.cpp

   98   setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom);
  210   case ISD::UMUL_LOHI:          return LowerUMUL_LOHI(Op, DAG);
  558   assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI &&