reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenDAGISel.inc

36259 /* 79846*/  /*SwitchOpcode*/ 53|128,1/*181*/, TARGET_VAL(ISD::SSUBSAT),// ->80031

gen/lib/Target/ARM/ARMGenFastISel.inc

 5182   case ISD::SSUBSAT: return fastEmit_ISD_SSUBSAT_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);

gen/lib/Target/X86/X86GenDAGISel.inc

77913 /*163923*/          /*SwitchOpcode*/ 62, TARGET_VAL(ISD::SSUBSAT),// ->163988
83037 /*174014*/          /*SwitchOpcode*/ 62, TARGET_VAL(ISD::SSUBSAT),// ->174079
100605 /*209090*/          /*SwitchOpcode*/ 39, TARGET_VAL(ISD::SSUBSAT),// ->209132
108029 /*223949*/          /*SwitchOpcode*/ 38, TARGET_VAL(ISD::SSUBSAT),// ->223990
118605 /*244995*/        /*SwitchOpcode*/ 66, TARGET_VAL(ISD::SSUBSAT),// ->245064
120550 /*248814*/        /*SwitchOpcode*/ 113, TARGET_VAL(ISD::SSUBSAT),// ->248930
124205 /*255856*/          /*SwitchOpcode*/ 19, TARGET_VAL(ISD::SSUBSAT),// ->255878
126660 /*260450*/          /*SwitchOpcode*/ 18, TARGET_VAL(ISD::SSUBSAT),// ->260471
145350 /*297476*/            OPC_CheckOpcode, TARGET_VAL(ISD::SSUBSAT),
147315 /*301076*/          /*SwitchOpcode*/ 34, TARGET_VAL(ISD::SSUBSAT),// ->301113
187063 /*378129*/          /*SwitchOpcode*/ 34, TARGET_VAL(ISD::SSUBSAT),// ->378166
187862 /*379596*/          /*SwitchOpcode*/ 34, TARGET_VAL(ISD::SSUBSAT),// ->379633
188610 /*381059*/          /*SwitchOpcode*/ 19, TARGET_VAL(ISD::SSUBSAT),// ->381081
188942 /*381645*/          /*SwitchOpcode*/ 18, TARGET_VAL(ISD::SSUBSAT),// ->381666
214226 /*434743*/  /*SwitchOpcode*/ 51|128,3/*435*/, TARGET_VAL(ISD::SSUBSAT),// ->435182

gen/lib/Target/X86/X86GenFastISel.inc

13529   case ISD::SSUBSAT: return fastEmit_ISD_SSUBSAT_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1497   case ISD::SSUBSAT:

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 1120   case ISD::SSUBSAT:
 3333   case ISD::SSUBSAT:

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  153   case ISD::SSUBSAT:
  676     case ISD::SSUBSAT:
 1788   case ISD::SSUBSAT:

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  450   case ISD::SSUBSAT:
  827   case ISD::SSUBSAT:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  127   case ISD::SSUBSAT:
  960   case ISD::SSUBSAT:
 2751   case ISD::SSUBSAT:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 4714   case ISD::SSUBSAT: return std::make_pair(C1.ssub_sat(C2), true);
 5112   case ISD::SSUBSAT:
 5382       case ISD::SSUBSAT:
 5407     case ISD::SSUBSAT:

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 6304     setValue(&I, DAG.getNode(ISD::SSUBSAT, sdl, Op1.getValueType(), Op1, Op2));

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  303   case ISD::SSUBSAT:                    return "ssubsat";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 6912   case ISD::SSUBSAT:
 7146   unsigned OpcSat = IsAdd ? ISD::SADDSAT : ISD::SSUBSAT;

lib/CodeGen/TargetLoweringBase.cpp

  651     setOperationAction(ISD::SSUBSAT, VT, Expand);

lib/Target/ARM/ARMISelLowering.cpp

  270     setOperationAction(ISD::SSUBSAT, VT, Legal);
 1026     setOperationAction(ISD::SSUBSAT, MVT::i8, Custom);
 1028     setOperationAction(ISD::SSUBSAT, MVT::i16, Custom);
 1032     setOperationAction(ISD::SSUBSAT, MVT::i32, Legal);
 9218   case ISD::SSUBSAT:
 9305   case ISD::SSUBSAT:

lib/Target/X86/X86ISelLowering.cpp

  882     setOperationAction(ISD::SSUBSAT,            MVT::v16i8, Legal);
  886     setOperationAction(ISD::SSUBSAT,            MVT::v8i16, Legal);
 1213     setOperationAction(ISD::SSUBSAT,   MVT::v32i8,  HasInt256 ? Legal : Custom);
 1217     setOperationAction(ISD::SSUBSAT,   MVT::v16i16, HasInt256 ? Legal : Custom);
 1339       setOperationAction(ISD::SSUBSAT,          VT, Custom);
 1602       setOperationAction(ISD::SSUBSAT,            VT, Custom);
 1686       setOperationAction(ISD::SSUBSAT,      VT, Legal);
24911     case ISD::SSUBSAT:
27769   case ISD::SSUBSAT:            return LowerADDSAT_SUBSAT(Op, DAG, Subtarget);

lib/Target/X86/X86TargetTransformInfo.cpp

 1919     { ISD::SSUBSAT,    MVT::v32i16,  1 },
 1920     { ISD::SSUBSAT,    MVT::v64i8,   1 },
 1980     { ISD::SSUBSAT,    MVT::v16i16,  1 },
 1981     { ISD::SSUBSAT,    MVT::v32i8,   1 },
 2017     { ISD::SSUBSAT,    MVT::v16i16,  4 }, // 2 x 128-bit Op + extract/insert
 2018     { ISD::SSUBSAT,    MVT::v32i8,   4 }, // 2 x 128-bit Op + extract/insert
 2093     { ISD::SSUBSAT,    MVT::v8i16,   1 },
 2094     { ISD::SSUBSAT,    MVT::v16i8,   1 },
 2171     ISD = ISD::SSUBSAT;