reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

50644 /*108994*/        OPC_CheckChild2CondCode, ISD::SETOLE,
50672 /*109070*/        OPC_CheckChild2CondCode, ISD::SETOLE,
51146 /*110363*/        OPC_CheckChild2CondCode, ISD::SETOLE,
51174 /*110439*/        OPC_CheckChild2CondCode, ISD::SETOLE,
51648 /*111732*/        OPC_CheckChild2CondCode, ISD::SETOLE,
51676 /*111808*/        OPC_CheckChild2CondCode, ISD::SETOLE,
60951 /*133172*/        OPC_CheckChild2CondCode, ISD::SETOLE,
61408 /*134269*/        OPC_CheckChild2CondCode, ISD::SETOLE,
61870 /*135376*/        OPC_CheckChild2CondCode, ISD::SETOLE,

gen/lib/Target/Hexagon/HexagonGenDAGISel.inc

30300 /* 58510*/          OPC_CheckChild2CondCode, ISD::SETOLE,
30455 /* 58856*/          OPC_CheckChild2CondCode, ISD::SETOLE,
51999 /* 98004*/          OPC_CheckChild2CondCode, ISD::SETOLE,

gen/lib/Target/Mips/MipsGenDAGISel.inc

17161 /* 32046*/        OPC_CheckChild2CondCode, ISD::SETOLE,
17245 /* 32202*/        OPC_CheckChild2CondCode, ISD::SETOLE,
17414 /* 32559*/        OPC_CheckChild2CondCode, ISD::SETOLE,
17498 /* 32715*/        OPC_CheckChild2CondCode, ISD::SETOLE,
17959 /* 33636*/        OPC_CheckChild2CondCode, ISD::SETOLE,
18062 /* 33827*/        OPC_CheckChild2CondCode, ISD::SETOLE,

gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc

61224 /*129490*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61248 /*129538*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61272 /*129586*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61286 /*129613*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61300 /*129640*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61324 /*129688*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61348 /*129736*/      OPC_CheckChild2CondCode, ISD::SETOLE,
61362 /*129763*/      OPC_CheckChild2CondCode, ISD::SETOLE,
64156 /*135358*/      OPC_CheckChild2CondCode, ISD::SETOLE,
64185 /*135422*/      OPC_CheckChild2CondCode, ISD::SETOLE,
64214 /*135486*/      OPC_CheckChild2CondCode, ISD::SETOLE,
64243 /*135550*/      OPC_CheckChild2CondCode, ISD::SETOLE,
66838 /*141283*/        OPC_CheckChild2CondCode, ISD::SETOLE,
67536 /*142778*/        OPC_CheckChild2CondCode, ISD::SETOLE,
68146 /*144091*/        OPC_CheckChild2CondCode, ISD::SETOLE,

gen/lib/Target/PowerPC/PPCGenDAGISel.inc

26941 /* 65325*/        OPC_CheckChild2CondCode, ISD::SETOLE,
27151 /* 65854*/        OPC_CheckChild2CondCode, ISD::SETOLE,

gen/lib/Target/RISCV/RISCVGenDAGISel.inc

 7279 /* 13549*/        OPC_CheckChild2CondCode, ISD::SETOLE,
 7500 /* 14029*/        OPC_CheckChild2CondCode, ISD::SETOLE,

gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc

 7747 /* 14362*/            OPC_CheckChild2CondCode, ISD::SETOLE,
 7823 /* 14501*/            OPC_CheckChild2CondCode, ISD::SETOLE,
 8133 /* 15077*/            OPC_CheckChild2CondCode, ISD::SETOLE,
 8216 /* 15230*/          OPC_CheckChild2CondCode, ISD::SETOLE,

lib/CodeGen/Analysis.cpp

  208   case FCmpInst::FCMP_OLE:   return ISD::SETOLE;
  228     case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE;

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 8141   case ISD::SETOLE:
12291       case ISD::SETOLE:

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 1684     case ISD::SETOLE:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 1984   case ISD::SETOLE:
 2066     case ISD::SETOLE: return getBoolConstant(R==APFloat::cmpLessThan ||

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  403     case ISD::SETOLE:                   return "setole";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

  312   case ISD::SETOLE:
 3726               isCondCodeLegal(ISD::SETOLE, N0.getSimpleValueType()))
 3727             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
 3729               isCondCodeLegal(ISD::SETOLE, N0.getSimpleValueType()))

lib/Target/AArch64/AArch64ISelLowering.cpp

 1478   case ISD::SETOLE:

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

 1289   case ISD::SETOLE:

lib/Target/AMDGPU/R600ISelLowering.cpp

  127   setCondCodeAction(ISD::SETOLE, MVT::f32, Expand);

lib/Target/AMDGPU/SIInsertSkips.cpp

  211     case ISD::SETOLE:

lib/Target/ARM/ARMISelLowering.cpp

 1826   case ISD::SETOLE: CondCode = ARMCC::LS; break;
 4614   if (CC == ISD::SETUGE || CC == ISD::SETOGE || CC == ISD::SETOLE ||
 4625   if (CC == ISD::SETOLE || CC == ISD::SETULE || CC == ISD::SETOLT ||
 6226     case ISD::SETOLE:

lib/Target/Lanai/LanaiISelLowering.cpp

  853   case ISD::SETOLE:

lib/Target/Mips/MipsISelLowering.cpp

  615   case ISD::SETOLE: return Mips::FCOND_OLE;

lib/Target/Mips/MipsSEISelLowering.cpp

 1831                         Op->getOperand(2), ISD::SETOLE);

lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

  550     case ISD::SETOLE:

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

 3792         case ISD::SETOLE:
 3819         case ISD::SETOLE:
 3839   case ISD::SETOLE:
 3886   case ISD::SETOLE:
 3908       case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break;

lib/Target/PowerPC/PPCISelLowering.cpp

  495   setCondCodeAction(ISD::SETOLE, MVT::f32, Expand);
  496   setCondCodeAction(ISD::SETOLE, MVT::f64, Expand);
  896         setCondCodeAction(ISD::SETOLE, MVT::f128, Expand);
 7294     case ISD::SETOLE:
 7335   case ISD::SETOLE:

lib/Target/Sparc/SparcISelLowering.cpp

 1394   case ISD::SETOLE: return SPCC::FCC_LE;

lib/Target/SystemZ/SystemZISelLowering.cpp

 1948   CONV(LE);

lib/Target/X86/X86ISelLowering.cpp

 4725   case ISD::SETOLE:
 4745   case ISD::SETOLE:              // flipped
20469   case ISD::SETOLE: SSECC = 2; break;
36861       case ISD::SETOLE:
36954       case ISD::SETOLE: