reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenDAGISel.inc

85443 /*197770*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
85463 /*197813*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
85483 /*197858*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
85503 /*197900*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
85523 /*197943*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
85543 /*197988*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
91603 /*208902*/  /*SwitchOpcode*/ 80|128,6/*848*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->209754

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

59432 /*130047*/  /*SwitchOpcode*/ 61, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->130111

gen/lib/Target/ARM/ARMGenDAGISel.inc

 8951 /* 18768*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
 8971 /* 18809*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
 8991 /* 18849*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
 9011 /* 18890*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
29811 /* 65651*/  /*SwitchOpcode*/ 94|128,13/*1758*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->67413

gen/lib/Target/BPF/BPFGenDAGISel.inc

   57 /*     0*/  OPC_SwitchOpcode /*29 cases */, 21|128,1/*149*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->154

gen/lib/Target/Hexagon/HexagonGenDAGISel.inc

29300 /* 56546*/        OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
64843 /*124713*/  /*SwitchOpcode*/ 60|128,2/*316*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->125033

gen/lib/Target/Mips/MipsGenDAGISel.inc

 6970 /* 13510*/  /*SwitchOpcode*/ 117|128,10/*1397*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->14911

gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc

10895 /* 20756*/  /*SwitchOpcode*/ 92|128,4|128,4/*66140*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->86901

gen/lib/Target/PowerPC/PPCGenDAGISel.inc

24477 /* 59267*/  /*SwitchOpcode*/ 79|128,7/*975*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->60246

gen/lib/Target/RISCV/RISCVGenDAGISel.inc

 5875 /* 10821*/  /*SwitchOpcode*/ 12|128,6/*780*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->11605

gen/lib/Target/SystemZ/SystemZGenDAGISel.inc

 3706 /*  7340*/      /*SwitchOpcode*/ 27, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->7370
21062 /* 39592*/  /*SwitchOpcode*/ 125, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->39720

gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc

 8268 /* 15324*/  /*SwitchOpcode*/ 4|128,5/*644*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->15972

gen/lib/Target/X86/X86GenDAGISel.inc

57501 /*121609*/  /*SwitchOpcode*/ 60|128,3/*444*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->122057

gen/lib/Target/XCore/XCoreGenDAGISel.inc

 1063 /*  1727*/  /*SwitchOpcode*/ 105|128,1/*233*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->1964
 1311 /*  2166*/      OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),

include/llvm/CodeGen/SelectionDAGNodes.h

  678     return (NodeType == ISD::INTRINSIC_W_CHAIN ||

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

  989   case ISD::INTRINSIC_W_CHAIN:
 3704   case ISD::INTRINSIC_W_CHAIN:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 3319   case ISD::INTRINSIC_W_CHAIN:
 3937       Opcode == ISD::INTRINSIC_W_CHAIN ||
 4088         Opcode == ISD::INTRINSIC_W_CHAIN ||
 6586           Opcode == ISD::INTRINSIC_W_CHAIN ||

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 4789       Info.opc == ISD::INTRINSIC_W_CHAIN)
 4834     Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(), VTs, Ops);

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  143   case ISD::INTRINSIC_W_CHAIN: {

lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

 3646   if (N->getOpcode() != ISD::INTRINSIC_W_CHAIN &&

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 2584           Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
 2619           Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
 2631           Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
 2643           Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
 2657        Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
 2691           Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||

lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

 2826   if (IRG_SP->getOpcode() != ISD::INTRINSIC_W_CHAIN ||
 2970   case ISD::INTRINSIC_W_CHAIN: {

lib/Target/AArch64/AArch64ISelLowering.cpp

  616   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
 1074   case ISD::INTRINSIC_W_CHAIN: {
 8378     Info.opc = ISD::INTRINSIC_W_CHAIN;
 8418     Info.opc = ISD::INTRINSIC_W_CHAIN;
 8429     Info.opc = ISD::INTRINSIC_W_CHAIN;
 8439     Info.opc = ISD::INTRINSIC_W_CHAIN;
 8448     Info.opc = ISD::INTRINSIC_W_CHAIN;
11777   case ISD::INTRINSIC_W_CHAIN:

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

  909   case ISD::INTRINSIC_W_CHAIN: {

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  567   case ISD::INTRINSIC_W_CHAIN:

lib/Target/AMDGPU/SIISelLowering.cpp

  681   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::v2f16, Custom);
  682   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::v2i16, Custom);
  683   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::v4f16, Custom);
  684   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::v4i16, Custom);
  685   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::v8f16, Custom);
  686   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
  687   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::f16, Custom);
  688   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i16, Custom);
  689   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i8, Custom);
  930       Info.opc = ISD::INTRINSIC_W_CHAIN;
  944       Info.opc = ISD::INTRINSIC_W_CHAIN;
  964     Info.opc = ISD::INTRINSIC_W_CHAIN;
 1005     Info.opc = ISD::INTRINSIC_W_CHAIN;
 4039   case ISD::INTRINSIC_W_CHAIN: return LowerINTRINSIC_W_CHAIN(Op, DAG);
 4135       IsIntrinsic ? (unsigned)ISD::INTRINSIC_W_CHAIN : Opcode, DL,
 4305   case ISD::INTRINSIC_W_CHAIN: {
 4390   if (Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN) {
 4468                    Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN;
10873     case ISD::INTRINSIC_W_CHAIN:

lib/Target/ARM/ARMISelDAGToDAG.cpp

 3336       if (InFlag.getOperand(0).getOpcode() == ISD::INTRINSIC_W_CHAIN) {
 3797   case ISD::INTRINSIC_W_CHAIN: {

lib/Target/ARM/ARMISelLowering.cpp

  900     setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
 3137   SDValue CurrentTEB = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL,
 5880   SDValue FPSCR = DAG.getNode(ISD::INTRINSIC_W_CHAIN, dl, MVT::i32, Ops);
 9044   SDValue Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL,
12876                             N->getOpcode() == ISD::INTRINSIC_W_CHAIN);
13109   if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN)
14065   case ISD::INTRINSIC_W_CHAIN: {
14530   case ISD::INTRINSIC_W_CHAIN:
15414   case ISD::INTRINSIC_W_CHAIN: {
16255     Info.opc = ISD::INTRINSIC_W_CHAIN;
16271     Info.opc = ISD::INTRINSIC_W_CHAIN;
16334     Info.opc = ISD::INTRINSIC_W_CHAIN;
16346     Info.opc = ISD::INTRINSIC_W_CHAIN;
16356     Info.opc = ISD::INTRINSIC_W_CHAIN;
16366     Info.opc = ISD::INTRINSIC_W_CHAIN;

lib/Target/BPF/BPFISelDAGToDAG.cpp

  204   case ISD::INTRINSIC_W_CHAIN: {
  478   if (BaseV.getOpcode() != ISD::INTRINSIC_W_CHAIN)

lib/Target/Hexagon/HexagonISelDAGToDAG.cpp

  186   if (IntN->getOpcode() != ISD::INTRINSIC_W_CHAIN)
  274   if (C->getOpcode() != ISD::INTRINSIC_W_CHAIN)
  319   if (IntN->getOpcode() != ISD::INTRINSIC_W_CHAIN)
  360   if (IntN->getOpcode() != ISD::INTRINSIC_W_CHAIN)
  886   case ISD::INTRINSIC_W_CHAIN:    return SelectIntrinsicWChain(N);

lib/Target/Hexagon/HexagonISelLowering.cpp

 1787     Info.opc = ISD::INTRINSIC_W_CHAIN;
 1818     Info.opc = ISD::INTRINSIC_W_CHAIN;

lib/Target/Mips/MipsSEISelDAGToDAG.cpp

  833   case ISD::INTRINSIC_W_CHAIN: {

lib/Target/Mips/MipsSEISelLowering.cpp

  202   setOperationAction(ISD::INTRINSIC_W_CHAIN,  MVT::i64, Custom);
  213   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
  462   case ISD::INTRINSIC_W_CHAIN:  return lowerINTRINSIC_W_CHAIN(Op, DAG);

lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

  143   case ISD::INTRINSIC_W_CHAIN:
 1239   if (N->getOpcode() == ISD::INTRINSIC_W_CHAIN) {
 1296     case ISD::INTRINSIC_W_CHAIN:
 1372       case ISD::INTRINSIC_W_CHAIN:
 1442       case ISD::INTRINSIC_W_CHAIN:
 1518       case ISD::INTRINSIC_W_CHAIN:
 1588       case ISD::INTRINSIC_W_CHAIN:

lib/Target/NVPTX/NVPTXISelLowering.cpp

  446   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
  487       setOperationAction(ISD::INTRINSIC_W_CHAIN, VT, Custom);
  492   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i8, Custom);
 2180   case ISD::INTRINSIC_W_CHAIN:
 3462     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3495     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3519     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3545     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3583     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3604     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3625     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3646     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3663     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3778     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3791     Info.opc = ISD::INTRINSIC_W_CHAIN;
 3811     Info.opc = ISD::INTRINSIC_W_CHAIN;
 5036           DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, LdResVTs, Ops,
 5055   case ISD::INTRINSIC_W_CHAIN:

lib/Target/PowerPC/PPCISelLowering.cpp

  473   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i1, Custom);
 1125   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
 8356     SDValue LoadedVect = DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN,
10166   case ISD::INTRINSIC_W_CHAIN:  return SDValue();
10202   case ISD::INTRINSIC_W_CHAIN: {
11770   if (N->getOpcode() == ISD::INTRINSIC_W_CHAIN) {
13142   case ISD::INTRINSIC_W_CHAIN: {
13701         DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, dl,
13731         DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, dl,
13855   case ISD::INTRINSIC_W_CHAIN:
13973     if (Cond.getOpcode() == ISD::INTRINSIC_W_CHAIN &&
13999         LHS.getOperand(0).getOpcode() == ISD::INTRINSIC_W_CHAIN &&
14006     if (LHS.getOpcode() == ISD::INTRINSIC_W_CHAIN &&
14673     Info.opc = ISD::INTRINSIC_W_CHAIN;
14707     Info.opc = ISD::INTRINSIC_W_CHAIN;

lib/Target/RISCV/RISCVISelLowering.cpp

  241     Info.opc = ISD::INTRINSIC_W_CHAIN;

lib/Target/SystemZ/SystemZISelLowering.cpp

  623   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
 2486     if (CmpOp0.getOpcode() == ISD::INTRINSIC_W_CHAIN &&
 2540     case ISD::INTRINSIC_W_CHAIN:
 5014   case ISD::INTRINSIC_W_CHAIN:

lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp

  194   case ISD::INTRINSIC_W_CHAIN: {

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  576     Info.opc = ISD::INTRINSIC_W_CHAIN;
  590     Info.opc = ISD::INTRINSIC_W_CHAIN;
  598     Info.opc = ISD::INTRINSIC_W_CHAIN;
 1006   case ISD::INTRINSIC_W_CHAIN:
 1203   case ISD::INTRINSIC_W_CHAIN:

lib/Target/X86/X86ISelDAGToDAG.cpp

 2261       Parent->getOpcode() != ISD::INTRINSIC_W_CHAIN && // unaligned loads, fixme

lib/Target/X86/X86ISelLowering.cpp

 1771   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
 1774     setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom);
 4817     Info.opc = ISD::INTRINSIC_W_CHAIN;
27727   case ISD::INTRINSIC_W_CHAIN:  return LowerINTRINSIC_W_CHAIN(Op, Subtarget, DAG);
28253   case ISD::INTRINSIC_W_CHAIN: {
31491           Opc == ISD::INTRINSIC_W_CHAIN ||

lib/Target/XCore/XCoreISelDAGToDAG.cpp

  242   if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN)

lib/Target/XCore/XCoreISelLowering.cpp

  172   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
 1831   case ISD::INTRINSIC_W_CHAIN: