reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

76133 /*169041*/  /*SwitchOpcode*/ 35, TARGET_VAL(ISD::FLOG2),// ->169079

gen/lib/Target/AMDGPU/R600GenDAGISel.inc

 9941 /* 37971*/  /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(ISD::FLOG2),// ->38181

gen/lib/Target/Mips/MipsGenDAGISel.inc

29687 /* 56520*/  /*SwitchOpcode*/ 25, TARGET_VAL(ISD::FLOG2),// ->56548

gen/lib/Target/Mips/MipsGenFastISel.inc

 1200   case ISD::FLOG2: return fastEmit_ISD_FLOG2_r(VT, RetVT, Op0, Op0IsKill);

include/llvm/CodeGen/BasicTTIImpl.h

 1230       ISDs.push_back(ISD::FLOG2);

include/llvm/CodeGen/TargetLowering.h

  956       case ISD::STRICT_FLOG2: EqOpc = ISD::FLOG2; break;

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3868   case ISD::FLOG2:
 4397   case ISD::FLOG2:

lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

   80     case ISD::FLOG2:       R = SoftenFloatRes_FLOG2(N); break;
 1153   case ISD::FLOG2:      ExpandFloatRes_FLOG2(N, Lo, Hi); break;
 2062     case ISD::FLOG2:

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  418   case ISD::FLOG2:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

   88   case ISD::FLOG2:
  900   case ISD::FLOG2:
 2861   case ISD::FLOG2:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 4049   case ISD::FLOG2:
 7769   case ISD::STRICT_FLOG2:      NewOpc = ISD::FLOG2;      break;

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 5201   return DAG.getNode(ISD::FLOG2, dl, Op.getValueType(), Op);
 7655         if (visitUnaryFloatCall(I, ISD::FLOG2))

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  217   case ISD::FLOG2:                      return "flog2";

lib/CodeGen/TargetLoweringBase.cpp

  768     setOperationAction(ISD::FLOG2,      VT, Expand);

lib/Target/AArch64/AArch64ISelLowering.cpp

  389   setOperationAction(ISD::FLOG2,   MVT::f16,   Promote);
  390   setOperationAction(ISD::FLOG2,   MVT::v4f16, Expand);
  391   setOperationAction(ISD::FLOG2,   MVT::v8f16, Expand);
  832     setOperationAction(ISD::FLOG2, VT, Expand);

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  253   setOperationAction(ISD::FLOG2,  MVT::f32, Legal);
  412     setOperationAction(ISD::FLOG2, VT, Expand);
 2290   SDValue Log2Operand = DAG.getNode(ISD::FLOG2, SL, VT, Operand);

lib/Target/AMDGPU/SIISelLowering.cpp

 8584   case ISD::FLOG2:

lib/Target/ARM/ARMISelLowering.cpp

  340       setOperationAction(ISD::FLOG2, VT, Expand);
  785     setOperationAction(ISD::FLOG2, MVT::v2f64, Expand);
  806     setOperationAction(ISD::FLOG2, MVT::v4f32, Expand);
  822     setOperationAction(ISD::FLOG2, MVT::v2f32, Expand);
  951     setOperationAction(ISD::FLOG2,      MVT::f64, Expand);
 1383     setOperationAction(ISD::FLOG2, MVT::f16, Promote);

lib/Target/Hexagon/HexagonISelLowering.cpp

 1429     ISD::FCOS,    ISD::FPOW,    ISD::FLOG,    ISD::FLOG2,

lib/Target/Mips/MipsISelLowering.cpp

  445   setOperationAction(ISD::FLOG2,             MVT::f32,   Expand);

lib/Target/Mips/MipsSEISelLowering.cpp

  154     setOperationAction(ISD::FLOG2, MVT::f16, Promote);
  390     setOperationAction(ISD::FLOG2, Ty, Legal);
 1899     return DAG.getNode(ISD::FLOG2, DL, Op->getValueType(0), Op->getOperand(1));

lib/Target/PowerPC/PPCISelLowering.cpp

  635       setOperationAction(ISD::FLOG2, VT, Expand);
  968     setOperationAction(ISD::FLOG2 , MVT::v4f64, Expand);
 1013     setOperationAction(ISD::FLOG2 , MVT::v4f32, Expand);

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  185                     ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10,

lib/Target/X86/X86ISelLowering.cpp

  720   setOperationAction(ISD::FLOG2, MVT::f80, Expand);
  737     setOperationAction(ISD::FLOG2,     VT, Expand);