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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenDAGISel.inc254047 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254057 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254534 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254544 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254787 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254795 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
include/llvm/CodeGen/Analysis.h 108 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
112 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
112 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
117 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
include/llvm/CodeGen/ISDOpcodes.h 1053 inline bool isSignedIntSetCC(CondCode Code) {
1059 inline bool isUnsignedIntSetCC(CondCode Code) {
1066 inline bool isTrueWhenEqual(CondCode Cond) {
1073 inline unsigned getUnorderedFlavor(CondCode Cond) {
1079 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
1079 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
1083 CondCode getSetCCSwappedOperands(CondCode Operation);
1083 CondCode getSetCCSwappedOperands(CondCode Operation);
1088 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
1088 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
1088 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
1093 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
1093 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
1093 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
include/llvm/CodeGen/SelectionDAG.h 350 SDNodeT *newSDNode(ArgTypes &&... Args) {
738 SDValue getCondCode(ISD::CondCode Cond);
978 ISD::CondCode Cond) {
1003 SDValue False, ISD::CondCode Cond) {
1461 SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond,
include/llvm/CodeGen/SelectionDAGNodes.h 2165 ISD::CondCode Condition;
2167 explicit CondCodeSDNode(ISD::CondCode Cond)
2172 ISD::CondCode get() const { return Condition; }
include/llvm/CodeGen/SwitchLoweringUtils.h 114 ISD::CondCode CC;
138 CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
include/llvm/CodeGen/TargetLowering.h 1184 getCondCodeAction(ISD::CondCode CC, MVT VT) const {
1197 bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const {
1203 bool isCondCodeLegalOrCustom(ISD::CondCode CC, MVT VT) const {
2092 void setCondCodeAction(ISD::CondCode CC, MVT VT,
2634 void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) {
2640 ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const {
2826 ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL];
3024 SDValue &NewRHS, ISD::CondCode &CCCode,
3295 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
4242 SDValue foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
4244 SDValue foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
4248 SDValue N1, ISD::CondCode Cond,
4254 EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond,
4258 SDValue CompTargetNode, ISD::CondCode Cond,
4262 ISD::CondCode Cond, DAGCombinerInfo &DCI,
4266 SDValue CompTargetNode, ISD::CondCode Cond,
4270 ISD::CondCode Cond, DAGCombinerInfo &DCI,
lib/CodeGen/Analysis.cpp 201 ISD::CondCode llvm::getFCmpCondCode(FCmpInst::Predicate Pred) {
223 ISD::CondCode llvm::getFCmpCodeWithoutNaN(ISD::CondCode CC) {
223 ISD::CondCode llvm::getFCmpCodeWithoutNaN(ISD::CondCode CC) {
238 ISD::CondCode llvm::getICmpCondCode(ICmpInst::Predicate Pred) {
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 500 SDValue N2, SDValue N3, ISD::CondCode CC,
504 ISD::CondCode CC);
506 SDValue N2, SDValue N3, ISD::CondCode CC);
511 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
2015 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
4436 ISD::CondCode CC0 = cast<CondCodeSDNode>(N0CC)->get();
4437 ISD::CondCode CC1 = cast<CondCodeSDNode>(N1CC)->get();
4546 ISD::CondCode NewCC = IsAnd ? ISD::getSetCCAndOperation(CC0, CC1, IsInteger)
6906 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(),
8133 ISD::CondCode CC, const TargetLowering &TLI,
8196 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
8452 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
8699 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
8799 ISD::CondCode CC = cast<CondCodeSDNode>(N4)->get();
8989 ISD::CondCode CC = cast<CondCodeSDNode>(User->getOperand(2))->get();
9391 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
9545 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
12286 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
19724 ISD::CondCode CC;
19907 ISD::CondCode CC) {
19976 ISD::CondCode CC) {
20030 SDValue N2, SDValue N3, ISD::CondCode CC,
20178 ISD::CondCode Cond, const SDLoc &DL,
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1032 ISD::CondCode CCCode =
1637 ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
1645 ISD::CondCode InvCC = ISD::getSetCCSwappedOperands(CCCode);
1668 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID;
3093 ISD::CondCode Pred;
3359 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT;
3557 ISD::CondCode CCOp = cast<CondCodeSDNode>(CC)->get();
3577 ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp,
3587 ISD::CondCode SwapInvCC = ISD::getSetCCSwappedOperands(InvCC);
4322 ISD::CondCode CCCode =
4335 ISD::CondCode CCCode =
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 916 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
972 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
996 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1680 ISD::CondCode &CCCode,
1710 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1770 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1788 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1995 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 1244 ISD::CondCode CCCode) {
2077 static std::pair<ISD::CondCode, ISD::NodeType> getExpandedMinMaxOps(int Op) {
2096 ISD::CondCode CondC;
2307 ISD::CondCode Cond;
3646 ISD::CondCode &CCCode,
3683 ISD::CondCode LowCC;
3792 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
3810 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
3828 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
lib/CodeGen/SelectionDAG/LegalizeTypes.h 380 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
462 ISD::CondCode &CCCode, const SDLoc &dl);
611 ISD::CondCode &CCCode, const SDLoc &dl);
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 345 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
345 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
355 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
355 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
371 static int isSignedOp(ISD::CondCode Opcode) {
387 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
387 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
387 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
407 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
407 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
407 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
414 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
1549 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1969 ISD::CondCode Cond, const SDLoc &dl) {
2096 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 2041 ISD::CondCode Condition;
2063 ISD::CondCode Opc = InvertCond ? ISD::SETNE : ISD::SETEQ;
3204 ISD::CondCode Opcode = getICmpCondCode(predicate);
3232 ISD::CondCode Condition = getFCmpCondCode(predicate);
10243 ISD::CondCode CC;
lib/CodeGen/SelectionDAG/TargetLowering.cpp 277 ISD::CondCode &CCCode,
1248 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
2780 ISD::CondCode Cond, const SDLoc &DL,
2848 EVT SCCVT, SDValue N0, SDValue N1, ISD::CondCode Cond, DAGCombinerInfo &DCI,
2871 ISD::CondCode NewCond;
2872 if (Cond == ISD::CondCode::SETULT) {
2873 NewCond = ISD::CondCode::SETEQ;
2874 } else if (Cond == ISD::CondCode::SETULE) {
2875 NewCond = ISD::CondCode::SETEQ;
2878 } else if (Cond == ISD::CondCode::SETUGT) {
2879 NewCond = ISD::CondCode::SETNE;
2882 } else if (Cond == ISD::CondCode::SETUGE) {
2883 NewCond = ISD::CondCode::SETNE;
2936 EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond,
3009 ISD::CondCode Cond, const SDLoc &DL,
3051 ISD::CondCode Cond, bool foldBooleans,
3063 ISD::CondCode SwappedCC = ISD::getSetCCSwappedOperands(Cond);
3124 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE;
3135 ISD::CondCode InvCond = ISD::getSetCCInverse(Cond, true);
3224 ISD::CondCode InvCond = ISD::getSetCCInverse(
3390 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
3508 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT;
3528 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT;
3672 ISD::CondCode NewCond = Cond;
3709 ISD::CondCode SwapCond = ISD::getSetCCSwappedOperands(Cond);
3769 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
4908 ISD::CondCode Cond,
4924 SDValue CompTargetNode, ISD::CondCode Cond,
5075 ISD::CondCode Cond,
5092 SDValue CompTargetNode, ISD::CondCode Cond,
6862 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
7126 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT;
lib/CodeGen/TargetLoweringBase.cpp 529 static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
530 memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
lib/Target/AArch64/AArch64ISelLowering.cpp 1428 static AArch64CC::CondCode changeIntCCToAArch64CC(ISD::CondCode CC) {
1456 static void changeFPCCToAArch64CC(ISD::CondCode CC,
1519 static void changeFPCCToANDAArch64CC(ISD::CondCode CC,
1549 static void changeVectorFPCCToAArch64CC(ISD::CondCode CC,
1597 static bool isCMN(SDValue Op, ISD::CondCode CC) {
1602 static SDValue emitComparison(SDValue LHS, SDValue RHS, ISD::CondCode CC,
1701 ISD::CondCode CC, SDValue CCOp,
1818 ISD::CondCode CC = cast<CondCodeSDNode>(Val->getOperand(2))->get();
1970 static SDValue getAArch64Cmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2271 ISD::CondCode CC = cast<CondCodeSDNode>(Sel.getOperand(4))->get();
4678 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
4950 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
5016 SDValue AArch64TargetLowering::LowerSELECT_CC(ISD::CondCode CC, SDValue LHS,
5206 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
5239 ISD::CondCode CC;
8147 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
10161 ISD::CondCode CC;
lib/Target/AArch64/AArch64ISelLowering.h 658 SDValue LowerSELECT_CC(ISD::CondCode CC, SDValue LHS, SDValue RHS,
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 2030 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 1268 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get();
3433 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
3568 ISD::CondCode NewCC = getSetCCInverse(cast<CondCodeSDNode>(CC)->get(),
lib/Target/AMDGPU/R600ISelLowering.cpp 973 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get();
974 ISD::CondCode InverseCC =
981 ISD::CondCode SwapInvCC = ISD::getSetCCSwappedOperands(InverseCC);
1008 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get();
1010 ISD::CondCode CCSwapped = ISD::getSetCCSwappedOperands(CCOpcode);
1016 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT.isInteger());
1028 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get();
1989 ISD::CondCode NCC = cast<CondCodeSDNode>(N->getOperand(4))->get();
2001 ISD::CondCode LHSCC = cast<CondCodeSDNode>(LHS.getOperand(4))->get();
lib/Target/AMDGPU/SIISelLowering.cpp 4205 ISD::CondCode CCOpcode = getICmpCondCode(IcInput);
4239 ISD::CondCode CCOpcode = getFCmpCondCode(IcInput);
8293 ISD::CondCode LCC = cast<CondCodeSDNode>(LHS.getOperand(2))->get();
8294 ISD::CondCode RCC = cast<CondCodeSDNode>(RHS.getOperand(2))->get();
8335 ISD::CondCode LCC = cast<CondCodeSDNode>(LHS.getOperand(2))->get();
9777 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
lib/Target/ARC/ARCISelLowering.cpp 41 static ARCCC::CondCode ISDCCtoARCCC(ISD::CondCode isdCC) {
166 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
199 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
lib/Target/ARM/ARMISelLowering.cpp 427 const ISD::CondCode Cond;
505 const ISD::CondCode Cond;
604 const ISD::CondCode Cond;
1797 static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) {
1814 static void FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode,
3667 DAG.getSetCC(dl, MVT::i1, CLSHi, Constant31, ISD::CondCode::SETEQ);
3669 DAG.getSetCC(dl, MVT::i1, Hi, Constant0, ISD::CondCode::SETEQ);
4181 SDValue ARMTargetLowering::getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
4610 static void checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode,
4686 static bool isGTorGE(ISD::CondCode CC) {
4690 static bool isLTorLE(ISD::CondCode CC) {
4702 const ISD::CondCode CC, const SDValue K) {
4712 const ISD::CondCode CC, const SDValue K) {
4742 ISD::CondCode CC1 = cast<CondCodeSDNode>(Op.getOperand(4))->get();
4752 ISD::CondCode CC2 = cast<CondCodeSDNode>(Op2.getOperand(4))->get();
4840 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
4918 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
5124 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
5211 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
6166 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
14039 static SDValue SearchLoopIntrinsic(SDValue N, ISD::CondCode &CC, int &Imm,
14091 ISD::CondCode CC;
lib/Target/ARM/ARMISelLowering.h 825 SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
lib/Target/AVR/AVRISelLowering.cpp 422 static AVRCC::CondCodes intCCToAVRCC(ISD::CondCode CC) {
443 SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
621 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
639 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
654 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
lib/Target/AVR/AVRISelLowering.h 137 SDValue getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &AVRcc,
lib/Target/BPF/BPFISelLowering.cpp 484 static void NegateCC(SDValue &LHS, SDValue &RHS, ISD::CondCode &CC) {
500 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
518 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
lib/Target/Hexagon/HexagonISelLowering.cpp 814 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
lib/Target/Lanai/LanaiISelLowering.cpp 803 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
lib/Target/MSP430/MSP430ISelLowering.cpp 152 const ISD::CondCode Cond;
1028 ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) {
1115 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
1147 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
1210 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
lib/Target/Mips/MipsISelLowering.cpp 604 static Mips::CondCode condCodeToFCC(ISD::CondCode CC) {
659 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
709 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
745 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
lib/Target/Mips/MipsSEISelLowering.cpp 949 static bool isLegalDSPCondCode(EVT Ty, ISD::CondCode CC) {
lib/Target/NVPTX/NVPTXISelLowering.cpp 1953 ISD::CondCode::SETEQ);
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 218 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2484 SDValue get32BitZExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2486 SDValue get32BitSExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2488 SDValue get64BitZExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2490 SDValue get64BitSExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2890 ISD::CondCode CC,
3063 ISD::CondCode CC,
3235 ISD::CondCode CC,
3392 ISD::CondCode CC,
3592 ISD::CondCode CC =
3678 SDValue PPCDAGToDAGISel::SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC,
3835 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
3866 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) {
3898 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC,
4009 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
4207 static bool mayUseP9Setb(SDNode *N, const ISD::CondCode &CC, SelectionDAG *DAG,
4256 ISD::CondCode InnerCC =
4808 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
5014 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
5270 ISD::CondCode CC = cast<CondCodeSDNode>(O.getOperand(4))->get();
lib/Target/PowerPC/PPCISelLowering.cpp 2976 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
7235 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
11993 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
12042 ISD::CondCode CC =
12584 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
13993 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
15539 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
lib/Target/RISCV/RISCVISelLowering.cpp 143 ISD::CondCode FPCCToExtend[] = {
155 for (auto CC : FPCCToExtend)
172 for (auto CC : FPCCToExtend)
332 static void normaliseSetCC(SDValue &LHS, SDValue &RHS, ISD::CondCode &CC) {
349 static unsigned getBranchOpcodeForIntCondCode(ISD::CondCode CC) {
631 ISD::CondCode CCVal = CC->get();
1254 auto CC = static_cast<ISD::CondCode>(MI.getOperand(3).getImm());
lib/Target/Sparc/SparcISelLowering.cpp 1364 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
1382 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
1882 ISD::CondCode CC, unsigned &SPCC) {
2431 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
2469 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
lib/Target/SystemZ/SystemZISelLowering.cpp 1933 static unsigned CCMaskForCondCode(ISD::CondCode CC) {
2450 ISD::CondCode Cond) {
2482 ISD::CondCode Cond, const SDLoc &DL) {
2605 static unsigned getVectorComparison(ISD::CondCode CC, bool IsFP) {
2631 static unsigned getVectorComparisonOrInvert(ISD::CondCode CC, bool IsFP,
2682 ISD::CondCode CC,
2740 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
2752 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
2794 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
lib/Target/SystemZ/SystemZISelLowering.h 535 EVT VT, ISD::CondCode CC,
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 88 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
lib/Target/X86/X86ISelDAGToDAG.cpp 4117 ISD::CondCode CC = cast<CondCodeSDNode>(Setcc.getOperand(2))->get();
lib/Target/X86/X86ISelLowering.cpp 4666 static X86::CondCode TranslateIntegerX86CC(ISD::CondCode SetCCOpcode) {
4685 static X86::CondCode TranslateX86CC(ISD::CondCode SetCCOpcode, const SDLoc &DL,
9380 ISD::CondCode::SETEQ);
9410 ISD::CondCode::SETGT);
9449 ISD::CondCode::SETGT);
9485 ISD::CondCode::SETGT);
19959 static SDValue LowerVectorAllZeroTest(SDValue Op, ISD::CondCode CC,
20363 static SDValue LowerAndToBT(SDValue And, ISD::CondCode CC,
20444 static unsigned translateX86FSETCC(ISD::CondCode SetCCOpcode, SDValue &Op0,
20528 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
20574 ISD::CondCode Cond, const SDLoc &dl,
20632 ISD::CondCode Cond = cast<CondCodeSDNode>(CC)->get();
20943 static SDValue EmitAVX512Test(SDValue Op0, SDValue Op1, ISD::CondCode CC,
21001 ISD::CondCode CC, const SDLoc &dl,
21067 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
23148 ISD::CondCode CC = (ISD::CondCode)IntrData->Opc1;
25005 ISD::CondCode CC;
25007 case ISD::SMIN: CC = ISD::CondCode::SETLT; break;
25008 case ISD::SMAX: CC = ISD::CondCode::SETGT; break;
25009 case ISD::UMIN: CC = ISD::CondCode::SETULT; break;
25010 case ISD::UMAX: CC = ISD::CondCode::SETUGT; break;
35930 ISD::CondCode CondCode;
35934 CondCode = ISD::CondCode::SETNE;
35939 CondCode = ISD::CondCode::SETEQ;
36578 ISD::CondCode NewCC =
36840 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
36991 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37076 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37081 ISD::CondCode NewCC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGE;
37096 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37165 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
42432 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
42651 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
42817 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
lib/Target/X86/X86ISelLowering.h 1491 ISD::CondCode CC, const SDLoc &dl,
lib/Target/X86/X86InstrInfo.cpp 2312 unsigned X86::getVPCMPImmForCond(ISD::CondCode CC) {
lib/Target/X86/X86InstrInfo.h 62 unsigned getVPCMPImmForCond(ISD::CondCode CC);
usr/include/c++/7.4.0/bits/move.h 72 constexpr _Tp&&
73 forward(typename std::remove_reference<_Tp>::type& __t) noexcept
83 constexpr _Tp&&
84 forward(typename std::remove_reference<_Tp>::type&& __t) noexcept
usr/include/c++/7.4.0/bits/stl_pair.h 100 return __and_<is_constructible<_T1, const _U1&>,
100 return __and_<is_constructible<_T1, const _U1&>,
107 return __and_<is_convertible<const _U1&, _T1>,
107 return __and_<is_convertible<const _U1&, _T1>,
114 return __and_<is_constructible<_T1, _U1&&>,
114 return __and_<is_constructible<_T1, _U1&&>,
121 return __and_<is_convertible<_U1&&, _T1>,
121 return __and_<is_convertible<_U1&&, _T1>,
128 using __do_converts = __and_<is_convertible<const _U1&, _T1>,
128 using __do_converts = __and_<is_convertible<const _U1&, _T1>,
133 return __and_<is_constructible<_T1, const _U1&>,
133 return __and_<is_constructible<_T1, const _U1&>,
142 using __do_converts = __and_<is_convertible<_U1&&, _T1>,
142 using __do_converts = __and_<is_convertible<_U1&&, _T1>,
147 return __and_<is_constructible<_T1, _U1&&>,
147 return __and_<is_constructible<_T1, _U1&&>,
209 : private __pair_base<_T1, _T2>
211 typedef _T1 first_type; /// @c first_type is the first bound type
214 _T1 first; /// @c first is a copy of the first object
252 using _PCCP = _PCC<true, _T1, _T2>;
260 constexpr pair(const _T1& __a, const _T2& __b)
269 explicit constexpr pair(const _T1& __a, const _T2& __b)
283 _T1, _T2>;
311 constexpr pair(_U1&& __x, const _T2& __y)
325 constexpr pair(const _T1& __x, _U2&& __y)
332 explicit pair(const _T1& __x, _U2&& __y)
341 constexpr pair(_U1&& __x, _U2&& __y)
342 : first(std::forward<_U1>(__x)), second(std::forward<_U2>(__y)) { }
379 __and_<is_copy_assignable<_T1>,
390 __and_<is_move_assignable<_T1>,
522 constexpr pair<typename __decay_and_strip<_T1>::__type,
524 make_pair(_T1&& __x, _T2&& __y)
526 typedef typename __decay_and_strip<_T1>::__type __ds_type1;
529 return __pair_type(std::forward<_T1>(__x), std::forward<_T2>(__y));
usr/include/c++/7.4.0/initializer_list 50 typedef _E value_type;
51 typedef const _E& reference;
52 typedef const _E& const_reference;
54 typedef const _E* iterator;
55 typedef const _E* const_iterator;
usr/include/c++/7.4.0/tuple 125 constexpr _Head_base(const _Head& __h)
132 constexpr _Head_base(_UHead&& __h)
159 static constexpr _Head&
162 static constexpr const _Head&
194 static constexpr _Head&
197 static constexpr const _Head&
210 constexpr _Tuple_impl(const _Head& __head, const _Tail&... __tail)
216 constexpr _Tuple_impl(_UHead&& __head, _UTail&&... __tail)
248 const _Head& __head, const _Tail&... __tail)
473 return __and_<is_constructible<_Elements, const _UElements&>...>::value;
479 return __and_<is_convertible<const _UElements&, _Elements>...>::value;
485 return __and_<is_constructible<_Elements, _UElements&&>...>::value;
491 return __and_<is_convertible<_UElements&&, _Elements>...>::value;
947 constexpr tuple(const _T1& __a1, const _T2& __a2)
956 explicit constexpr tuple(const _T1& __a1, const _T2& __a2)
971 constexpr tuple(_U1&& __a1, _U2&& __a2)
1078 const _T1& __a1, const _T2& __a2)
1090 const _T1& __a1, const _T2& __a2)
1241 operator=(const pair<_U1, _U2>& __in)
1250 operator=(pair<_U1, _U2>&& __in)
1252 this->_M_head(*this) = std::forward<_U1>(__in.first);
1588 constexpr tuple<_Elements&...>
1589 tie(_Elements&... __args) noexcept
usr/include/c++/7.4.0/type_traits 215 : public __is_void_helper<typename remove_cv<_Tp>::type>::type
326 : public __is_integral_helper<typename remove_cv<_Tp>::type>::type
354 : public __is_floating_point_helper<typename remove_cv<_Tp>::type>::type
581 : public __or_<is_lvalue_reference<_Tp>,
582 is_rvalue_reference<_Tp>>::type
588 : public __or_<is_integral<_Tp>, is_floating_point<_Tp>>::type
588 : public __or_<is_integral<_Tp>, is_floating_point<_Tp>>::type
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
602 is_void<_Tp>>>::type
611 : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
611 : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
611 : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
612 is_member_pointer<_Tp>, is_null_pointer<_Tp>>::type
612 is_member_pointer<_Tp>, is_null_pointer<_Tp>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
777 : public __and_<is_array<_Tp>, __not_<extent<_Tp>>>
777 : public __and_<is_array<_Tp>, __not_<extent<_Tp>>>
825 : public __is_destructible_safe<_Tp>::type
984 typedef decltype(__test<_Tp, _Arg>(0)) type;
989 : public __and_<is_destructible<_Tp>,
990 __is_direct_constructible_impl<_Tp, _Arg>>
1072 __is_direct_constructible_ref_cast<_Tp, _Arg>,
1073 __is_direct_constructible_new_safe<_Tp, _Arg>
1079 : public __is_direct_constructible_new<_Tp, _Arg>::type
1119 : public __is_direct_constructible<_Tp, _Arg>
1130 : public __is_constructible_impl<_Tp, _Args...>::type
1246 : public is_nothrow_constructible<_Tp, _Tp&&>
1286 : public is_assignable<_Tp&, const _Tp&>
1286 : public is_assignable<_Tp&, const _Tp&>
1292 : public __is_copy_assignable_impl<_Tp>
1304 : public is_assignable<_Tp&, _Tp&&>
1304 : public is_assignable<_Tp&, _Tp&&>
1310 : public __is_move_assignable_impl<_Tp>
1526 static void __test_aux(_To1);
1538 typedef decltype(__test<_From, _To>(0)) type;
1545 : public __is_convertible_helper<_From, _To>::type
1554 { typedef _Tp type; };
1563 { typedef _Tp type; };
1574 remove_const<typename remove_volatile<_Tp>::type>::type type;
1629 { typedef _Tp type; };
1633 { typedef _Tp type; };
1659 { typedef _Tp&& type; };
2104 { typedef typename remove_cv<_Up>::type __type; };
2118 typedef typename remove_reference<_Tp>::type __remove_type;
2131 typedef _Tp __type;
2144 typename decay<_Tp>::type>::__type __type;