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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc98055 /*221139*/ /*SwitchOpcode*/ 58|128,2/*314*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->221457
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc47912 /*103179*/ /*SwitchOpcode*/ 25|128,3/*409*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->103592
gen/lib/Target/AMDGPU/R600GenDAGISel.inc 7270 /* 28137*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_SWAP),// ->28253
gen/lib/Target/Mips/MipsGenDAGISel.inc23968 /* 44954*/ /*SwitchOpcode*/ 67, TARGET_VAL(ISD::ATOMIC_SWAP),// ->45024
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc55515 /*118959*/ /*SwitchOpcode*/ 111|128,3/*495*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->119458
gen/lib/Target/PowerPC/PPCGenDAGISel.inc22532 /* 55759*/ /*SwitchOpcode*/ 79, TARGET_VAL(ISD::ATOMIC_SWAP),// ->55841
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 8423 /* 15714*/ /*SwitchOpcode*/ 89|128,3/*473*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->16191
gen/lib/Target/Sparc/SparcGenDAGISel.inc 1280 /* 2301*/ /*SwitchOpcode*/ 38, TARGET_VAL(ISD::ATOMIC_SWAP),// ->2342
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc20642 /* 38758*/ /*SwitchOpcode*/ 44, TARGET_VAL(ISD::ATOMIC_SWAP),// ->38805
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc 743 /* 1205*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
777 /* 1265*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
811 /* 1324*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
845 /* 1384*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
1209 /* 2068*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
1242 /* 2131*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
1763 /* 3109*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
1794 /* 3169*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
2515 /* 4452*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
2544 /* 4504*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
2573 /* 4555*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
2602 /* 4607*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
3013 /* 5351*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
3039 /* 5399*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
3451 /* 6197*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
3479 /* 6252*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
4035 /* 7312*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
4061 /* 7364*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
4423 /* 8053*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
4444 /* 8093*/ OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_SWAP),
5694 /* 10406*/ /*SwitchOpcode*/ 88|128,1/*216*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->10626
7053 /* 13065*/ /*SwitchOpcode*/ 105|128,2/*361*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->13430
14488 /* 28271*/ /*SwitchOpcode*/ 89|128,4/*601*/, TARGET_VAL(ISD::ATOMIC_SWAP),// ->28876
gen/lib/Target/X86/X86GenDAGISel.inc53016 /*112325*/ /*SwitchOpcode*/ 86, TARGET_VAL(ISD::ATOMIC_SWAP),// ->112414
include/llvm/CodeGen/SelectionDAGNodes.h 1409 N->getOpcode() == ISD::ATOMIC_SWAP ||
1466 N->getOpcode() == ISD::ATOMIC_SWAP ||
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2743 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl,
3779 case ISD::ATOMIC_SWAP:
4557 case ISD::ATOMIC_SWAP: {
4567 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, NVT,
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 99 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
2098 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
2343 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT,
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 177 case ISD::ATOMIC_SWAP:
1727 case ISD::ATOMIC_SWAP:
4059 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl,
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 591 case ISD::ATOMIC_SWAP:
6530 Opcode == ISD::ATOMIC_SWAP ||
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 4592 case AtomicRMWInst::Xchg: NT = ISD::ATOMIC_SWAP; break;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
lib/CodeGen/TargetLoweringBase.cpp 458 OP_TO_LIBCALL(ISD::ATOMIC_SWAP, SYNC_LOCK_TEST_AND_SET)
615 setOperationAction(ISD::ATOMIC_SWAP, VT, Promote);
616 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT);
lib/Target/AMDGPU/SIISelLowering.cpp 736 setTargetDAGCombine(ISD::ATOMIC_SWAP);
9976 case ISD::ATOMIC_SWAP:
lib/Target/ARM/ARMISelLowering.cpp 1228 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand);
lib/Target/AVR/AVRISelLowering.cpp 134 setOperationAction(ISD::ATOMIC_SWAP, VT, Expand);
lib/Target/Mips/Mips16ISelLowering.cpp 132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand);
lib/Target/Sparc/SparcISelLowering.cpp 1588 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Legal);
1598 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Legal);
lib/Target/SystemZ/SystemZISelLowering.cpp 221 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Custom);
4980 case ISD::ATOMIC_SWAP:
lib/Target/X86/X86ISelLowering.cpp27242 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl,
28421 case ISD::ATOMIC_SWAP: