reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/GlobalISel/RegBankSelect.cpp

  121   const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank;
  262     const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank;
  603       MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);

lib/CodeGen/GlobalISel/RegisterBankInfo.cpp

  270                             PartMapping.RegBank);
  514   assert(RegBank && "Register bank not set");
  518   assert(RegBank->getSize() >= Length && "Register bank too small for Mask");
  524   if (RegBank)
  525     OS << *RegBank;
  536     if (Part->Length != First->Length || Part->RegBank != First->RegBank)
  536     if (Part->Length != First->Length || Part->RegBank != First->RegBank)
  707     MRI.setRegBank(NewVReg, *PartMap->RegBank);

lib/Target/AArch64/AArch64GenRegisterBankInfo.def

  125          Map.RegBank == &RB;

lib/Target/AArch64/AArch64RegisterBankInfo.cpp

  664           *AArch64GenRegisterBankInfo::PartMappings[OpRegBankIdx[0]].RegBank,
  665           *AArch64GenRegisterBankInfo::PartMappings[OpRegBankIdx[1]].RegBank,

lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def

  153   assert(BankID == ValMappings[Idx].BreakDown->RegBank->getID());

lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

  156          ValMapping.BreakDown[0].RegBank == ValMapping.BreakDown[1].RegBank);
  156          ValMapping.BreakDown[0].RegBank == ValMapping.BreakDown[1].RegBank);
 1695     MRI.setRegBank(DstReg, *DstMapping.BreakDown[0].RegBank);

lib/Target/ARM/ARMRegisterBankInfo.cpp

   52          PM.RegBank->getID() == RegBankID;
  474           (Mapping.RegBank->getID() != ARM::FPRRegBankID ||