reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
70 unsigned getHighBitIdx() const { return StartIdx + Length - 1; }
lib/CodeGen/GlobalISel/RegBankSelect.cpp181 (ValMapping.BreakDown[0].Length * ValMapping.NumBreakDowns == 183 (ValMapping.BreakDown[0].Length % RegTy.getScalarSizeInBits() ==lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
269 return hashPartialMapping(PartMapping.StartIdx, PartMapping.Length, 515 assert(Length && "Empty mapping"); 518 assert(RegBank->getSize() >= Length && "Register bank too small for Mask"); 536 if (Part->Length != First->Length || Part->RegBank != First->RegBank) 536 if (Part->Length != First->Length || Part->RegBank != First->RegBank) 706 NewVReg = MRI.createGenericVirtualRegister(LLT::scalar(PartMap->Length));lib/Target/AArch64/AArch64GenRegisterBankInfo.def
124 return Map.StartIdx == ValStartIdx && Map.Length == ValLength &&
lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def 152 assert(Log2_32_Ceil(Size) == Log2_32_Ceil(ValMappings[Idx].BreakDown->Length));
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp148 if (ValMapping.NumBreakDowns >= 2 || ValMapping.BreakDown[0].Length >= 64) 152 ValMapping.BreakDown[0].Length == 32 && 154 ValMapping.BreakDown[1].Length == 32 &&lib/Target/ARM/ARMRegisterBankInfo.cpp
51 return PM.StartIdx == Start && PM.Length == Length &&