reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
161 const PartialMapping *begin() const { return BreakDown; } 162 const PartialMapping *end() const { return BreakDown + NumBreakDowns; } 169 bool isValid() const { return BreakDown && NumBreakDowns; }lib/CodeGen/GlobalISel/RegBankSelect.cpp
121 const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank; 181 (ValMapping.BreakDown[0].Length * ValMapping.NumBreakDowns == 183 (ValMapping.BreakDown[0].Length % RegTy.getScalarSizeInBits() == 262 const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank; 603 MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);lib/Target/AArch64/AArch64GenRegisterBankInfo.def
135 return Map.BreakDown == &PartMappings[PartialMapBaseIdx] &&
lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def152 assert(Log2_32_Ceil(Size) == Log2_32_Ceil(ValMappings[Idx].BreakDown->Length)); 153 assert(BankID == ValMappings[Idx].BreakDown->RegBank->getID());lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
148 if (ValMapping.NumBreakDowns >= 2 || ValMapping.BreakDown[0].Length >= 64) 152 ValMapping.BreakDown[0].Length == 32 && 153 ValMapping.BreakDown[0].StartIdx == 0 && 154 ValMapping.BreakDown[1].Length == 32 && 155 ValMapping.BreakDown[1].StartIdx == 32 && 156 ValMapping.BreakDown[0].RegBank == ValMapping.BreakDown[1].RegBank); 156 ValMapping.BreakDown[0].RegBank == ValMapping.BreakDown[1].RegBank); 1695 MRI.setRegBank(DstReg, *DstMapping.BreakDown[0].RegBank);lib/Target/ARM/ARMRegisterBankInfo.cpp
94 return VM.NumBreakDowns == 1 && VM.BreakDown == BreakDown;