reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
224 Args[i].OrigRegs.push_back(Args[i].Regs[0]); 225 Args[i].Regs.clear(); 242 Args[i].Regs.push_back(Reg); 258 Register LargeReg = Args[i].Regs[0]; 264 Args[i].Regs.clear(); 275 Args[i].Regs.push_back(Unmerge.getReg(PartIdx)); 297 Register ArgReg = Args[i].Regs[0]; 305 unsigned NumArgRegs = Args[i].Regs.size(); 314 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA); 319 MIRBuilder.buildMerge(Args[i].OrigRegs[0], Args[i].Regs); 343 assert((j + (Args[i].Regs.size() - 1)) < ArgLocs.size() && 346 for (unsigned Part = 0; Part < Args[i].Regs.size(); ++Part) { 349 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA); 351 j += Args[i].Regs.size() - 1; 358 if (Args[i].Regs.size() > 1) {lib/Target/AArch64/AArch64CallLowering.cpp
235 SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx), 241 assert(OrigArg.Regs.size() == SplitVTs.size() && "Regs / types mismatch"); 247 SplitArgs.emplace_back(OrigArg.Regs[i], SplitTy, OrigArg.Flags[0], 352 if (CurVReg != CurArgInfo.Regs[0]) { 353 CurArgInfo.Regs[0] = CurVReg; 631 if (OutInfo.Regs.size() > 1) { 640 MachineInstr *RegDef = getDefIgnoringCopies(OutInfo.Regs[0], MRI);lib/Target/AMDGPU/AMDGPUCallLowering.cpp
166 assert(OrigArg.Regs.size() == SplitVTs.size()); 178 SplitArgs.emplace_back(OrigArg.Regs[SplitIdx], Ty,lib/Target/ARM/ARMCallLowering.cpp
142 assert(Arg.Regs.size() == 1 && "Can't handle multple regs yet"); 160 MIRBuilder.buildUnmerge(NewRegs, Arg.Regs[0]); 200 assert(OrigArg.Regs.size() == SplitVTs.size() && "Regs / types mismatch"); 207 SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx), 230 Register PartReg = OrigArg.Regs[i]; 366 assert(Arg.Regs.size() == 1 && "Can't handle multple regs yet"); 392 MIRBuilder.buildMerge(Arg.Regs[0], NewRegs);lib/Target/Mips/MipsCallLowering.cpp
69 assert(Args[ArgsIndex].Regs.size() == 1 && "Can't handle multple regs yet"); 78 if (!handleSplit(VRegs, ArgLocs, ArgLocsIndex, Args[ArgsIndex].Regs[0], 82 if (!assign(Args[ArgsIndex].Regs[0], ArgLocs[ArgLocsIndex], VT)) 715 ArgInfo Info = ArgInfo{OrigArg.Regs[i], SplitEVTs[i].getTypeForEVT(Ctx)};lib/Target/X86/X86CallLowering.cpp
64 assert(OrigArg.Regs.size() == 1 && "Can't handle multple regs yet"); 74 SplitArgs.emplace_back(OrigArg.Regs[0], VT.getTypeForEVT(Context), 89 SplitRegs.push_back(Info.Regs[0]); 414 if (OrigArg.Regs.size() > 1) 419 MIRBuilder.buildUnmerge(Regs, OrigArg.Regs[0]); 461 if (Info.OrigRet.Regs.size() > 1) 478 MIRBuilder.buildMerge(Info.OrigRet.Regs[0], NewRegs);