reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/CallingConvLower.h

  566                  return A.getValNo() < B.getValNo();
  566                  return A.getValNo() < B.getValNo();

lib/CodeGen/GlobalISel/CallLowering.cpp

  289     assert(VA.getValNo() == i && "Location doesn't correspond to current arg");

lib/Target/AArch64/AArch64CallingConvention.cpp

  135       State.addLoc(CCValAssign::getReg(It.getValNo(), MVT::i32, RegResult,

lib/Target/AArch64/AArch64FastISel.cpp

 3080     const Value *ArgVal = CLI.OutVals[VA.getValNo()];
 3081     MVT ArgVT = OutVTs[VA.getValNo()];
 3891     unsigned SrcReg = Reg + VA.getValNo();

lib/Target/ARM/ARMCallLowering.cpp

  152     assert(VA.getValNo() == NextVA.getValNo() &&
  152     assert(VA.getValNo() == NextVA.getValNo() &&
  376     assert(VA.getValNo() == NextVA.getValNo() &&
  376     assert(VA.getValNo() == NextVA.getValNo() &&

lib/Target/ARM/ARMFastISel.cpp

 1904     MVT ArgVT = ArgVTs[VA.getValNo()];
 1954     const Value *ArgVal = Args[VA.getValNo()];
 1955     Register Arg = ArgRegs[VA.getValNo()];
 1956     MVT ArgVT = ArgVTs[VA.getValNo()];
 2136     unsigned SrcReg = Reg + VA.getValNo();

lib/Target/ARM/ARMISelLowering.cpp

 3987     unsigned Index = VA.getValNo();
 4014     if (Ins[VA.getValNo()].isOrigArg()) {
 4016                    Ins[VA.getValNo()].getOrigArgIndex() - CurArgIdx);
 4017       CurArgIdx = Ins[VA.getValNo()].getOrigArgIndex();
 4074         if (VA.getLocReg() == ARM::R0 && Ins[VA.getValNo()].Flags.isReturned()) {
 4106       int index = VA.getValNo();

lib/Target/Mips/MipsCallLowering.cpp

  405           CCValAssign::getMem(VA.getValNo(), VA.getValVT(),
  408       ArgLocs[i] = CCValAssign::getReg(VA.getValNo(), VA.getValVT(),

lib/Target/Mips/MipsFastISel.cpp

 1157     const Value *ArgVal = CLI.OutVals[VA.getValNo()];
 1158     MVT ArgVT = OutVTs[VA.getValNo()];
 1730     unsigned SrcReg = Reg + VA.getValNo();

lib/Target/PowerPC/PPCFastISel.cpp

 1394     MVT ArgVT = ArgVTs[VA.getValNo()];
 1432     unsigned Arg = ArgRegs[VA.getValNo()];
 1433     MVT ArgVT = ArgVTs[VA.getValNo()];
 1745         unsigned SrcReg = Reg + VA.getValNo();

lib/Target/PowerPC/PPCISelLowering.cpp

 5542       assert((VA.getValNo() == ByValVA.getValNo()) && "ValNo mismatch!");
 5542       assert((VA.getValNo() == ByValVA.getValNo()) && "ValNo mismatch!");
 6837     SDValue Arg = OutVals[VA.getValNo()];

lib/Target/RISCV/RISCVISelLowering.cpp

 1417     State.addLoc(CCValAssign::getReg(VA1.getValNo(), VA1.getValVT(), Reg,
 1423         CCValAssign::getMem(VA1.getValNo(), VA1.getValVT(),

lib/Target/Sparc/SparcISelLowering.cpp

 1056     if (Outs[VA.getValNo()].IsFixed)
 1073         NewVA = CCValAssign::getReg(VA.getValNo(), VA.getValVT(),
 1079         NewVA = CCValAssign::getCustomReg(VA.getValNo(), VA.getValVT(),
 1084       NewVA = CCValAssign::getMem(VA.getValNo(), VA.getValVT(),

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  773       assert(ArgLocs[ValNo].getValNo() == ValNo &&

lib/Target/X86/X86FastISel.cpp

 1220     unsigned SrcReg = Reg + VA.getValNo();
 3320     const Value *ArgVal = OutVals[VA.getValNo()];
 3321     MVT ArgVT = OutVTs[VA.getValNo()];
 3326     unsigned ArgReg = ArgRegs[VA.getValNo()];
 3418       ISD::ArgFlagsTy Flags = OutFlags[VA.getValNo()];

lib/Target/X86/X86ISelLowering.cpp

 3168                           return A.getValNo() < B.getValNo();
 3168                           return A.getValNo() < B.getValNo();