reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/CallingConvLower.h

  372     unsigned FirstUnalloc = getFirstUnallocated(Regs);
  413     unsigned FirstUnalloc = getFirstUnallocated(Regs);

lib/Target/AArch64/AArch64ISelLowering.cpp

 3407   unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs);
 3445     unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs);

lib/Target/AMDGPU/SIISelLowering.cpp

 1656   unsigned RegIdx = CCInfo.getFirstUnallocated(ArgVGPRs);
 1678   unsigned RegIdx = CCInfo.getFirstUnallocated(ArgSGPRs);

lib/Target/ARC/ARCISelLowering.cpp

  524     unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs);

lib/Target/ARM/ARMCallingConv.cpp

  203     unsigned RegIdx = State.getFirstUnallocated(RegList);
  247     unsigned RegIdx = State.getFirstUnallocated(RegList);

lib/Target/ARM/ARMISelLowering.cpp

 3900     unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs);
 4003     unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs);

lib/Target/Hexagon/HexagonISelLowering.cpp

  139   unsigned RegNum = State.getFirstUnallocated(ArgRegs);

lib/Target/Mips/MipsCallLowering.cpp

  502     unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);

lib/Target/Mips/MipsISelLowering.cpp

 2785                                 State.getFirstUnallocated(F32Regs) != ValNo;
 4327   unsigned Idx = State.getFirstUnallocated(ArgRegs);
 4393     FirstReg = State->getFirstUnallocated(IntArgRegs);

lib/Target/PowerPC/PPCCallingConv.cpp

   42   unsigned RegNum = State.getFirstUnallocated(ArgRegs);
   67   unsigned RegNum = State.getFirstUnallocated(ArgRegs);
   93   unsigned RegNum = State.getFirstUnallocated(ArgRegs);

lib/Target/PowerPC/PPCISelLowering.cpp

 3615     FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs));
 3616     FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs));

lib/Target/RISCV/RISCVISelLowering.cpp

 1484   if (State.getFirstUnallocated(ArgFPR32s) == array_lengthof(ArgFPR32s))
 1486   if (State.getFirstUnallocated(ArgFPR64s) == array_lengthof(ArgFPR64s))
 1510     unsigned RegIdx = State.getFirstUnallocated(ArgGPRs);
 1945     unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);

lib/Target/Sparc/SparcISelLowering.cpp

  539     unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs);

lib/Target/X86/X86CallLowering.cpp

  169       NumXMMRegs = State.getFirstUnallocated(XMMArgRegs);

lib/Target/X86/X86CallingConv.cpp

  277   unsigned FirstFree = State.getFirstUnallocated(RegList);

lib/Target/X86/X86FastISel.cpp

 3464     unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs);

lib/Target/X86/X86ISelLowering.cpp

 3363     unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs);
 3364     unsigned NumXMMRegs = CCInfo.getFirstUnallocated(ArgXMMs);
 3895     unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs);

lib/Target/XCore/XCoreISelLowering.cpp

 1349     unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs);