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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10516 { 436 /* hint */, ARM::tHINT, Convert__Imm0_151_1__CondCode2_0, AMFBS_IsThumb_HasV6M, { MCK_CondCode, MCK_Imm0_15 }, },
10867 { 746 /* nop */, ARM::tHINT, Convert__imm_95_0__CondCode2_0, AMFBS_IsThumb_HasV6M, { MCK_CondCode }, },
11059 { 970 /* sev */, ARM::tHINT, Convert__imm_95_4__CondCode2_0, AMFBS_IsThumb_HasV6M, { MCK_CondCode }, },
11062 { 974 /* sevl */, ARM::tHINT, Convert__imm_95_5__CondCode2_0, AMFBS_IsThumb2_HasV8, { MCK_CondCode }, },
15055 { 3934 /* wfe */, ARM::tHINT, Convert__imm_95_2__CondCode2_0, AMFBS_IsThumb_HasV6M, { MCK_CondCode }, },
15058 { 3938 /* wfi */, ARM::tHINT, Convert__imm_95_3__CondCode2_0, AMFBS_IsThumb_HasV6M, { MCK_CondCode }, },
15066 { 3952 /* yield */, ARM::tHINT, Convert__imm_95_1__CondCode2_0, AMFBS_IsThumb_HasV6M, { MCK_CondCode }, },
gen/lib/Target/ARM/ARMGenAsmWriter.inc12753 case ARM::tHINT:
gen/lib/Target/ARM/ARMGenDAGISel.inc25365 /* 54824*/ OPC_MorphNodeTo0, TARGET_VAL(ARM::tHINT), 0|OPFL_Chain,
gen/lib/Target/ARM/ARMGenGlobalISel.inc23287 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::tHINT,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc12367 case ARM::tHINT: {
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp 214 return ARM::tHINT;
216 return ARM::tHINT;
336 RelaxedOp == ARM::tHINT) {
lib/Target/ARM/Thumb2InstrInfo.cpp 46 NopInst.setOpcode(ARM::tHINT);