|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10445 { 235 /* csdb */, ARM::t2HINT, Convert__imm_95_20__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode }, },
10446 { 235 /* csdb */, ARM::t2HINT, Convert__imm_95_20__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w }, },
10497 { 327 /* esb */, ARM::t2HINT, Convert__imm_95_16__CondCode2_0, AMFBS_IsThumb2_HasRAS, { MCK_CondCode }, },
10498 { 327 /* esb */, ARM::t2HINT, Convert__imm_95_16__CondCode2_0, AMFBS_IsThumb2_HasRAS, { MCK_CondCode, MCK__DOT_w }, },
10518 { 436 /* hint */, ARM::t2HINT, Convert__Imm0_2391_1__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_Imm0_239 }, },
10519 { 436 /* hint */, ARM::t2HINT, Convert__Imm0_2391_2__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_Imm0_239 }, },
10869 { 746 /* nop */, ARM::t2HINT, Convert__imm_95_0__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w }, },
11060 { 970 /* sev */, ARM::t2HINT, Convert__imm_95_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w }, },
11063 { 974 /* sevl */, ARM::t2HINT, Convert__imm_95_5__CondCode2_0, AMFBS_IsThumb2_HasV8, { MCK_CondCode, MCK__DOT_w }, },
15056 { 3934 /* wfe */, ARM::t2HINT, Convert__imm_95_2__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w }, },
15059 { 3938 /* wfi */, ARM::t2HINT, Convert__imm_95_3__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w }, },
15067 { 3952 /* yield */, ARM::t2HINT, Convert__imm_95_1__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK__DOT_w }, },
gen/lib/Target/ARM/ARMGenAsmWriter.inc12665 case ARM::t2HINT:
gen/lib/Target/ARM/ARMGenDAGISel.inc25377 /* 54847*/ OPC_MorphNodeTo0, TARGET_VAL(ARM::t2HINT), 0|OPFL_Chain,
gen/lib/Target/ARM/ARMGenGlobalISel.inc23409 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2HINT,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc12375 case ARM::t2HINT:
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7778 case ARM::t2HINT: {
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 789 case ARM::t2HINT:
2400 Inst.setOpcode(ARM::t2HINT);