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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10514 { 424 /* fsubd */, ARM::VSUBD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasVFP2_HasDPVFP, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, },
14944 { 3869 /* vsub */, ARM::VSUBD, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasVFP2_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, },
14959 { 3869 /* vsub */, ARM::VSUBD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasVFP2_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc43143 /* 95141*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VSUBD), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 4082 return fastEmitInst_rr(ARM::VSUBD, &ARM::DPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc25612 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VSUBD,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc13660 case ARM::VSUBD: {
lib/Target/ARM/ARMBaseInstrInfo.cpp 92 { ARM::VMLSD, ARM::VMULD, ARM::VSUBD, false, false },
95 { ARM::VNMLAD, ARM::VNMULD, ARM::VSUBD, true, false },
96 { ARM::VNMLSD, ARM::VMULD, ARM::VSUBD, true, false },
lib/Target/ARM/ARMFastISel.cpp 1816 Opc = is64bit ? ARM::VSUBD : ARM::VSUBS;