|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc14128 { 3390 /* vrev64 */, ARM::VREV64q8, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc23055 /* 49591*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV64q8), 0,
29723 /* 65426*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV64q8), 0,
39431 /* 86687*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV64q8), 0,
40184 /* 88138*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV64q8), 0,
40274 /* 88315*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV64q8), 0,
40427 /* 88616*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV64q8), 0,
53041 /*118510*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV64q8), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 493 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0, Op0IsKill);
873 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0, Op0IsKill);
903 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0, Op0IsKill);
1185 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0, Op0IsKill);
1460 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 8947 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV64q8,
9027 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV64q8,
11405 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV64q8,
11421 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV64q8,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 9708 case ARM::VREV64q8: