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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc14119 { 3383 /* vrev32 */, ARM::VREV32d16, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc28867 /* 62903*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV32d16), 0,
28894 /* 62984*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV32d16), 0,
28921 /* 63065*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV32d16), 0,
29134 /* 63719*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV32d16), 0,
29166 /* 63818*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV32d16), 0,
29198 /* 63917*/ OPC_EmitNode1, TARGET_VAL(ARM::VREV32d16), 0,
38858 /* 85616*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
38888 /* 85672*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
38936 /* 85762*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
38971 /* 85825*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
39024 /* 85922*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
39054 /* 85978*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
39102 /* 86068*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
39137 /* 86131*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
53167 /*118807*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VREV32d16), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 438 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
936 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
950 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
1043 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
1057 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
1257 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
1271 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
1364 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
1378 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 8585 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
8601 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
8665 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
8681 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
9613 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
9629 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
9693 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
9709 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VREV32d16,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 9699 case ARM::VREV32d16: