|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc13216 { 2779 /* vmov */, ARM::VMOVRS, Convert__Reg1_1__Reg1_2__CondCode2_0, AMFBS_HasFPRegs, { MCK_CondCode, MCK_GPR, MCK_HPR }, },
13252 { 2779 /* vmov */, ARM::VMOVRS, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_GPR, MCK_HPR }, },
13256 { 2779 /* vmov */, ARM::VMOVRS, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_GPR, MCK_HPR }, },
13262 { 2779 /* vmov */, ARM::VMOVRS, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_GPR, MCK_HPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc38703 /* 85330*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VMOVRS), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 743 return fastEmitInst_r(ARM::VMOVRS, &ARM::GPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 8020 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VMOVRS,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc13286 case ARM::VMOVRS: {
lib/Target/ARM/ARMBaseInstrInfo.cpp 852 Opc = ARM::VMOVRS;
4850 (MI.getOpcode() == ARM::VMOVRS || MI.getOpcode() == ARM::VMOVSR ||
4962 case ARM::VMOVRS:
lib/Target/ARM/ARMFastISel.cpp 413 TII.get(ARM::VMOVRS), MoveReg)
1116 TII.get(ARM::VMOVRS), MoveReg)
lib/Target/ARM/ARMHazardRecognizer.cpp 26 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
lib/Target/ARM/ARMISelDAGToDAG.cpp 453 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
lib/Target/ARM/MLxExpansionPass.cpp 189 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)