|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc13301 { 2784 /* vmovl */, ARM::VMOVLuv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc28034 /* 60674*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28052 /* 60721*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28549 /* 61958*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28572 /* 62024*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28625 /* 62182*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28653 /* 62266*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28702 /* 62408*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28730 /* 62492*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28871 /* 62918*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28898 /* 62999*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28955 /* 63172*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
28985 /* 63264*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29049 /* 63463*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29081 /* 63562*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29138 /* 63734*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29170 /* 63833*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29241 /* 64057*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29275 /* 64164*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29339 /* 64363*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29374 /* 64473*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29448 /* 64708*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
29487 /* 64833*/ OPC_EmitNode1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
47105 /*104492*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
52953 /*118270*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::VMOVLuv4i32), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 705 return fastEmitInst_r(ARM::VMOVLuv4i32, &ARM::QPRRegClass, Op0, Op0IsKill);
2660 return fastEmitInst_r(ARM::VMOVLuv4i32, &ARM::QPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc24476 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VMOVLuv4i32,
24967 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::VMOVLuv4i32,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 9641 case ARM::VMOVLuv4i32: