reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc

12877   { 2418 /* vldr */, ARM::VLDRD, Convert__Reg1_1__AddrMode52_2__CondCode2_0, AMFBS_HasFPRegs, { MCK_CondCode, MCK_DPR, MCK_AddrMode5 }, },
12881   { 2418 /* vldr */, ARM::VLDRD, Convert__Reg1_2__AddrMode52_3__CondCode2_0, AMFBS_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_AddrMode5 }, },

gen/lib/Target/ARM/ARMGenDAGISel.inc

27903 /* 60354*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::VLDRD), 0|OPFL_Chain|OPFL_MemRefs,

gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc

13681     case ARM::VLDRD:

lib/Target/ARM/ARMBaseInstrInfo.cpp

 1317       BuildMI(MBB, I, DL, get(ARM::VLDRD), DestReg)
 1458   case ARM::VLDRD:
 1856   case ARM::VLDRD:
 1877   case ARM::VLDRD:

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  569   case ARM::VLDRS: case ARM::VLDRD:

lib/Target/ARM/ARMConstantIslandPass.cpp

  822           case ARM::VLDRD:

lib/Target/ARM/ARMFastISel.cpp

  454   unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
  992       Opc = ARM::VLDRD;

lib/Target/ARM/ARMFrameLowering.cpp

 1416     BuildMI(MBB, MI, DL, TII.get(ARM::VLDRD), NextReg)

lib/Target/ARM/ARMInstructionSelector.cpp

  378       return isStore ? ARM::VSTRD : ARM::VLDRD;
  992     auto LoadOpcode = Size == 4 ? ARM::VLDRS : ARM::VLDRD;

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

  320   case ARM::VLDRD:
  416   return isi32Load(Opc) || Opc == ARM::VLDRS || Opc == ARM::VLDRD;
  452   case ARM::VLDRD:
 1043     case ARM::VLDRD:
 1342   case ARM::VLDRD:
 1367   case ARM::VLDRD:
 1394   bool isAM5 = (Opcode == ARM::VLDRD || Opcode == ARM::VLDRS ||
 1570   case ARM::VLDRD: