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References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
11355   { 1600 /* sub */, ARM::SUBrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, },
11371   { 1600 /* sub */, ARM::SUBrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc
 5309 /* 10794*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SUBrr), 0,
33346 /* 73386*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SUBrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc
 4709     return fastEmitInst_rr(ARM::SUBrr, &ARM::GPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc
 3681         GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::SUBrr,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc
14286     case ARM::SUBrr: {
lib/Target/ARM/ARMBaseInstrInfo.cpp
  209                          get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
  229                          get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
 2318   {ARM::SUBSrr, ARM::SUBrr},
 2772       (OI->getOpcode() == ARM::SUBrr || OI->getOpcode() == ARM::t2SUBrr) &&
 2863   case ARM::SUBrr:
 3108         bool IsSub = Opc == ARM::SUBrr || Opc == ARM::t2SUBrr ||
 3241   case ARM::SUBrr:
 3253     case ARM::SUBrr:
 3254       if (UseOpc == ARM::SUBrr && Commute)
lib/Target/ARM/ARMFastISel.cpp
 1767       Opc = isThumb2 ? ARM::t2SUBrr : ARM::SUBrr;
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
10048     case ARM::SUBrsi: newOpc = ARM::SUBrr; break;