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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc14131 { 3390 /* vrev64 */, ARM::MVE_VREV64_32, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_32, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc39381 /* 86593*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
39471 /* 86770*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
39546 /* 86910*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
39636 /* 87087*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
39864 /* 87528*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
39966 /* 87721*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
40377 /* 88522*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
40479 /* 88715*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
53091 /*118628*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
53119 /*118694*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_32), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 532 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
574 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1095 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1115 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1202 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1222 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1416 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1436 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1477 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
1497 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 9214 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
9234 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
9314 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
9334 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
10242 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
10262 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
10342 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
10362 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_32,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 4634 case ARM::MVE_VREV64_32: