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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc14130 { 3390 /* vrev64 */, ARM::MVE_VREV64_16, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_16, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc39411 /* 86652*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
39501 /* 86829*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
39711 /* 87227*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
39801 /* 87404*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
40029 /* 87845*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
40131 /* 88038*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
40407 /* 88581*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
40509 /* 88774*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
53071 /*118581*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
53139 /*118741*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV64_16), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 511 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
553 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
988 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1008 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1192 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1212 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1309 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1329 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1467 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1487 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 9254 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
9274 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
9354 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
9374 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
11122 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
11142 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
11222 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
11242 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV64_16,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 4633 case ARM::MVE_VREV64_16: