reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
14123   { 3383 /* vrev32 */, ARM::MVE_VREV32_8, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_8, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc
23805 /* 51324*/            OPC_EmitNode1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
24030 /* 51841*/            OPC_EmitNode1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
28443 /* 61657*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0|OPFL_Chain,
29787 /* 65591*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0|OPFL_Chain,
38554 /* 85008*/      OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
39606 /* 87028*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
39924 /* 87646*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
40224 /* 88221*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
40314 /* 88398*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
53186 /*118852*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_8), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc
  426     return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
  860     return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
  890     return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
 1075     return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
 1396     return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
 1613     return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc
10322       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_8,
10422       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_8,
11628       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_8,
11648       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_8,
30023       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_8,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc
 4632     case ARM::MVE_VREV32_8: