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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc14122 { 3383 /* vrev32 */, ARM::MVE_VREV32_16, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_16, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc39576 /* 86969*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
39666 /* 87146*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
39741 /* 87286*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
39831 /* 87463*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
39894 /* 87587*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
39996 /* 87780*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
40059 /* 87904*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
40161 /* 88097*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
53206 /*118899*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
53217 /*118926*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV32_16), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 447 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
459 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
978 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
998 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1085 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1105 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1299 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1319 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1406 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
1426 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc10282 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
10302 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
10382 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
10402 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
11162 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
11182 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
11262 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
11282 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV32_16,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 4631 case ARM::MVE_VREV32_16: