reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
14117   { 3376 /* vrev16 */, ARM::MVE_VREV16_8, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_8, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc
23409 /* 50412*/            OPC_EmitNode1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
23607 /* 50870*/            OPC_EmitNode1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
28459 /* 61703*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0|OPFL_Chain,
29804 /* 65638*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0|OPFL_Chain,
38544 /* 84982*/      OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
39771 /* 87345*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
40089 /* 87963*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
40254 /* 88280*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
40344 /* 88457*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
53247 /*118997*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VREV16_8), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc
  395     return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
  850     return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
  880     return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
  968     return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
 1289     return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
 1604     return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc
11202       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV16_8,
11302       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV16_8,
11668       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV16_8,
11688       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV16_8,
30045       GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VREV16_8,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc
 4630     case ARM::MVE_VREV16_8: