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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc13221 { 2779 /* vmov */, ARM::MVE_VORR, Convert__Reg1_1__Reg1_2__Reg1_2__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK_MQPR, MCK_MQPR }, },
13534 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_1__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13543 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_s16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13544 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_s32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13545 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_s8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13546 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13547 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13548 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13549 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_f32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13550 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_i16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13551 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_i32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13552 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_i8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13553 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_f16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenAsmWriter.inc12482 case ARM::MVE_VORR:
gen/lib/Target/ARM/ARMGenDAGISel.inc 3303 /* 6641*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VORR), 0,
3314 /* 6669*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VORR), 0,
3324 /* 6696*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VORR), 0,
3334 /* 6723*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VORR), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 4280 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4289 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4307 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4319 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 7218 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VORR,
7298 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VORR,
7362 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VORR,
7424 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VORR,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 4910 case ARM::MVE_VORR:
lib/Target/ARM/ARMBaseInstrInfo.cpp 858 Opc = Subtarget.hasNEON() ? ARM::VORRq : ARM::MVE_VORR;
863 if (Opc == ARM::VORRq || Opc == ARM::MVE_VORR)
865 if (Opc == ARM::MVE_VORR)
879 Opc = Subtarget.hasNEON() ? ARM::VORRq : ARM::MVE_VORR;
883 Opc = Subtarget.hasNEON() ? ARM::VORRq : ARM::MVE_VORR;
978 if (Opc == ARM::VORRq || Opc == ARM::MVE_VORR) {
982 if (Opc == ARM::MVE_VORR)
unittests/Target/ARM/MachineInstrTest.cpp 262 case MVE_VORR: