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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc12385 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_1__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12394 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_s16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12395 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_s32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12396 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_s8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12397 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12398 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12399 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12400 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_f32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12401 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_i16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12402 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_i32, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12403 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_i8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12404 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_f16, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc31428 /* 69113*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VEOR), 0,
31439 /* 69141*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VEOR), 0,
31449 /* 69168*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VEOR), 0,
31459 /* 69195*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MVE_VEOR), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 5082 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
5091 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
5109 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
5121 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 7650 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VEOR,
7730 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VEOR,
7794 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VEOR,
7856 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::MVE_VEOR,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 4886 case ARM::MVE_VEOR:
unittests/Target/ARM/MachineInstrTest.cpp 148 case MVE_VEOR: