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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10234 { 14 /* add */, ARM::ADDrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, },
10255 { 14 /* add */, ARM::ADDrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 5794 /* 11853*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 3410 return fastEmitInst_rr(ARM::ADDrr, &ARM::GPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 1547 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::ADDrr,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc14278 case ARM::ADDrr:
lib/Target/ARM/ARMAsmPrinter.cpp 1548 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr)
1794 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr)
lib/Target/ARM/ARMBaseInstrInfo.cpp 209 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
229 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
2313 {ARM::ADDSrr, ARM::ADDrr},
2807 (OI->getOpcode() == ARM::ADDrr || OI->getOpcode() == ARM::t2ADDrr ||
2859 case ARM::ADDrr:
3242 case ARM::ADDrr:
3252 case ARM::ADDrr:
3260 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::ADDri : ARM::SUBri;
3263 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::SUBri : ARM::ADDri;
lib/Target/ARM/ARMFastISel.cpp 1761 Opc = isThumb2 ? ARM::t2ADDrr : ARM::ADDrr;
lib/Target/ARM/ARMInstructionSelector.cpp 318 STORE_OPCODE(ADDrr, ADDrr);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp10049 case ARM::ADDrsi: newOpc = ARM::ADDrr; break;
unittests/tools/llvm-exegesis/ARM/AssemblerTest.cpp 36 MCInstBuilder(ARM::ADDrr)